Method of testing random-access memory

Details Method of testing random-access memory Method of testing random-access memory

1999-11-10

2003-05-20

Tu, Christine T. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S742000

Reexamination Certificate

active

06567940

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority of European Patent Application No. 98309192.7, which was filed on Nov. 10, 1998.
FIELD OF THE INVENTION
This invention relates to methods of testing random-access memory (RAM) without destroying the data stored in the memory.
BACKGROUND OF THE INVENTION
The conventional method of testing RAM is to cycle through all the addresses to be tested, and for each address to write a first test pattern consisting of a series of alternating ones and zeroes to the address and to compare what is actually stored at the address with the first test pattern and then to write a second test pattern consisting of the complementary series of alternating zeroes and ones to the address and to compare what is actually stored at the address with the second complementary test pattern. If any of the comparisons fails, the test fails and can be aborted at that point; if none of them fails the test succeeds.
A problem with this method is that any data stored in the RAM is overwritten and therefore lost. To avoid this it is necessary to load the data stored in the location into a register before applying the test patterns and to restore it afterwards. Thus the full method takes the form: For each address:
Load the data stored at the address into a register
Write the first test pattern (10101010 . . . ) to the address
Compare the data stored at the address with the first test pattern
Jump to FAILED if the comparison shows that they are not the same
Write the second test pattern (01010101 . . . ) to the address
Compare the data stored at the address with the second test pattern
Jump to FAILED if the comparison shows that they are not the same
Restore the original data from the register to the address.
This method includes three read and three write operations as well as two comparison instructions and two conditional jumps and furthermore does not reliably test for locations that can only be set or cleared once.
SUMMARY OF THE INVENTION
The invention is as set out in claim
1
.
With the claimed method each bit at the address being tested is changed twice, once when the original data word is inverted and once when the twice-inverted data word is written back to the address. The comparison will fail unless both changes are correctly made. Furthermore, the method contains only two write operations in addition to three read operations and only has one comparison instruction and one conditional jump.


REFERENCES:
patent: 5034923 (1991-07-01), Kuo et al.
patent: 5471482 (1995-11-01), Byers et al.
patent: 5699508 (1997-12-01), Khashayar

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