Method for forming Ta2O5 dielectric layer using plasma...

Details Method for forming Ta2O5 dielectric layer using plasma... Method for forming Ta2O5 dielectric layer using plasma...

2001-12-04

2003-03-25

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

C438S778000, C438S785000

Reexamination Certificate

active

06537925

ABSTRACT:

BACKGROUND
1. Technical Field
A method for forming a dielectric layer of a capacitor in a semiconductor device is disclosed. More particularly, a method for forming a Ta
2
O
5
dielectric layer using a plasma enhanced atomic layer deposition is disclosed.
2. Description of the Related Art
As the level of integration increases in semiconductor devices like DRAMs (Dynamic Random Access Memory), superior electrical properties, such as high charge capacity in a limited space and reduced leakage current are needed in a DRAM capacitor. For this reason, a Ta
2
O
5
dielectric layer, which is a high dielectric layer, is used for the dielectric layer of the capacitor.
Meanwhile, in case of a Ta
2
O
5
dielectric layer deposited by the LPCVD (Low Pressure Chemical Vapor Deposition) method, the electric property of a capacitor deteriorates because of inferior step coverage.
To solve this problem, the atomic layer deposition (ALD) is used to improve the step coverage by repeatedly depositing a plurality of atomic layers.
FIGS. 1A
to
1
D are cross-sectional views illustrating the conventional method for forming a Ta
2
O
5
dielectric layer.
First, as shown in
FIG. 1A
, after a polysilicon layer
11
to form a bottom electrode is deposited on a substrate
10
on which transistors and plugs are formed, the native oxide layer (now shown) on the surface of the polysilicon layer
11
is removed with HF or BOE (Buffer Oxide Etchant), and then the surface of the polysilicon layer
11
is subject to the RTP (Rapid Thermal Process) in the atmosphere of NH
3
.
Subsequently, as illustrated in
FIG. 1B
, a Ta
2
O
5
dielectric layer
12
A is deposited on the layer
11
by performing the atomic layer deposition (ALD) and the in-situ treatment of oxygen (O
2
) plasma.
Repeating these two procedures results in the depositing of a plurality of Ta
2
O
5
dielectric mono layers (
12
1
~
12
n
) which produces a Ta
2
O
5
dielectric layer
12
A with superior step coverage.
As illustrated in
FIG. 1C
, the process of oxygen (O
2
) plasma treatment is for thermally treating the Ta
2
O
5
dielectric layer
12
A in the oxygen atmosphere. This way, a crystallized Ta
2
O
5
dielectric layer
12
is formed.
Then, as depicted in
FIG. 1D
, a capacitor in a stacked structure of a polysilicon layer
11
, Ta
2
O
5
dielectric layer
12
and top electrode
13
is formed by depositing a top electrode
13
on the Ta
2
O
5
dielectric layer
12
.
The conventional method for forming a Ta
2
O
5
dielectric layer using the atomic layer deposition (ALD) and oxygen plasma described above has following problems.
First, the poor reactivity of oxygen makes carbon A remain in the Ta
2
O
5
dielectric layer
12
. Secondly, the weak activation energy of the oxygen still makes oxygen vacancy in the Ta
2
O
5
dielectric layer
12
, causing its electric property deteriorated by leakage current.
SUMMARY OF THE DISCLOSURE
A method for forming a Ta
2
O
5
dielectric layer using a plasma enhanced atomic layer deposition that can improve the quality of a layer and its electrical properties is disclosed.
More specifically, a method for forming a Ta
2
O
5
dielectric layer using plasma enhanced atomic layer deposition is disclosed that comprises: a) flowing Ta(OC
2
H
5
)
5
source gas in a chamber and generating plasma; b) depositing a Ta
2
O
5
layer by using the plasma; c) purging the chamber; d)repeatedly performing the steps a) to c) in order to form a Ta
2
O
5
dielectric layer; e) thermally treating the surface of the Ta
2
O
5
dielectric layer in an oxygen atmosphere; and f) crystallizing the Ta
2
O
5
dielectric layer.


REFERENCES:
patent: 6380579 (2002-04-01), Nam et al.
patent: 2000-0008815 (2000-02-01), None

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