Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-02-08
2003-07-08
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S298000, C257S300000, C257S303000, C257S306000, C257S310000, C257S532000
Reexamination Certificate
active
06590246
ABSTRACT:
TECHNICAL FIELD
The technical field relates generally to semiconductor integrated circuits. More particularly, it pertains to capacitors in semiconductor integrated circuits.
BACKGROUND
A capacitor is composed of two layers of a material that is electrically conductive (hereinafter, electrode) brought near to one another and separated by a material that is electrically nonconductive. Suppose the capacitor is connected to a battery with a certain voltage level (hereinafter, energy level). Charges will flow from the battery to be stored in the capacitor until the capacitor exhibits the energy level of the battery. Then, suppose further that the capacitor is disconnected from the battery. The capacitor will indefinitely exhibit the energy level of the battery until the charges stored in the capacitor are removed either by design or by accident.
This ability of the capacitor to “remember” an energy level is valuable to the operation of semiconductor integrated circuits. Often, the operation of such circuits may require that data be stored and retrieved as desired. Because of its ability to remember, the capacitor is a major component of a semiconductor memory cell. One memory cell may store one bit of data. A system of memory cells is a semiconductor memory array where information can be randomly stored or retrieved from each memory cell. Such a system is also known as a random-access memory.
One type of random-access memory is dynamic random-access memory (DRAM). The charges stored in DRAM tend to leak away over a short time. It is thus necessary to periodically refresh the charges stored in the DRAM by the use of additional circuitry. Even with the refresh burden, DRAM is a popular type of memory because it can occupy a very small space on a semiconductor surface. This is desirable because of the need to maximize storage capacity on the limited surface area of an integrated circuit.
One type of capacitor that supports an increase in storage capacity uses an electrode composed of a metal compound So that charges can be transferred into and out of the capacitor, a metallization layer is placed in connection with the metal compound electrode of the capacitor. The metallization layer may act with the metal compound to create a region that is electrically nonconductive. That act compromises the ability of charges to move into and out of the capacitor at the junction of the electrode. This effect is detrimental to the storage ability of a capacitor and would render a memory cell defective. One solution that has been proposed is to use polysilicon as a layer in contact with the capacitor. However, this solution is inadequate in that the polysilicon may act at a certain temperature with the metal compound electrode of the capacitor to form an electrically nonconductive region.
Thus, what is needed are systems, devices, structures, and methods to inhibit the described effect so as to maintain electrical contact between the metallization layer and the capacitor.
SUMMARY
The above-mentioned problems with capacitors as well as other problems are addressed by the present invention and will be understood by reading and studying the following specification. Systems, devices, structures, and methods are described which accord these benefits.
An illustrative embodiment includes a capacitor. The capacitor comprises a first electrode, a first dielectric coupled to the first electrode, and a second electrode coupled to the first dielectric. The second electrode includes an inhibiting layer so as to inhibit formation of an undesired second dielectric.
Another illustrative embodiment includes a capacitor. The capacitor comprises a first electrode that comprises at least one conductive metal oxide. The conductive metal oxide is selected from a group consisting of ruthenium oxide and iridium oxide. The capacitor includes a dielectric coupled to the first electrode. The dielectric comprises at least one insulator metal oxide. The metal oxide includes ditantalum pentaoxide. The capacitor includes a second electrode. The second electrode comprises the conductive metal oxide that is selected from a group consisting of ruthenium oxide and iridum oxide. The second electrode also comprises an inhibiting layer. The inhibiting layer comprises a substance selected from a group consisting of a transition metal, a transition metal alloy, a nitride compound, a noble metal, and a noble metal alloy. The transition metal is selected from a group consisting of platinum, rhodium, and tungsten. The transition metal alloy includes a platinum rhodium alloy. The nitride compound is selected from a group consisting of tungsten nitride and titanium nitride. The noble metal includes platinum, gold, titanium, and silver. The noble metal alloy includes graphite, chlorimet 3, and hastelloy C.
Another illustrative embodiment includes a semiconductor structure. The semiconductor structure includes an insulation layer and a first conductive layer abutting the insulation layer. The first conductive layer includes an inhibiting layer that inhibits a diffusion that increases resistivity.
Another illustrative embodiment includes a semiconductor structure. The semiconductor structure includes an insulation layer and a first conductive layer abutting the insulation layer. The first conductive layer includes an inhibiting layer that inhibits formation of an undesired oxidation compound so as to enhance an ohmic contact.
Another illustrative embodiment includes a method of forming a semiconductor structure. The method comprises forming a first conductive layer, forming an insulation layer abutting the first conductive layer, forming a second conductive layer abutting the insulation layer, and forming an inhibiting layer abutting the second conductive layer. The inhibiting layer inhibits formation of an undesired oxidation compound so as to enhance an ohmic contact.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 5032545 (1991-07-01), Doan et al.
patent: 5068199 (1991-11-01), Sandhu
patent: 5142438 (1992-08-01), Reinberg et al.
patent: 5335138 (1994-08-01), Sandhu et al.
patent: 5440173 (1995-08-01), Evans et al.
patent: 5573979 (1996-11-01), Tsu et al.
patent: 5604145 (1997-02-01), Hashizume et al.
patent: 5844771 (1998-12-01), Graettinger et al.
patent: 5963814 (1999-10-01), Walker et al.
patent: 5969983 (1999-10-01), Thakur et al.
patent: 5972771 (1999-10-01), Figura
patent: 6011284 (2000-01-01), Katori et al.
patent: 6207561 (2001-03-01), Huang et al.
patent: 0697719 (1996-02-01), None
Schwegman Lundberg Woessner & Kluth P.A.
Wojciechowicz Edward
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