Method of forming a self-aligned silicide device

Details Method of forming a self-aligned silicide device Method of forming a self-aligned silicide device

1997-09-11

1999-02-23

Booth, Richard A.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438653, 438655, 438657, 438296, 257413, H01L 213205, H01L 214763

Patent

active

058743537

ABSTRACT:
A method of forming self-aligned silicide devices which includes providing a silicon substrate having shallow trench isolation regions for defining a device area formed therein; then, forming sequentially a gate oxide layer, a polysilicon layer, a first titanium nitride layer, a titanium silicide layer, a second titanium nitride layer and a silicon nitride layer over the substrate. After a gate electrode is etched out from the above layers, a titanium layer is deposited over the device, and then a self-aligned titanium silicide layer is formed using a heating process. The use of a titanium silicide layer having protective top and bottom titanium nitride layers, compared with a single tungsten silicide layer in a conventional method, provides for a self-aligned silicide device having a rather low gate resistance; being free from narrow width effect of a titanium self-aligned silicide layer; is applicable to self-aligned contact window processes, and avoids the cross-diffusion of doped ions in the polysilicon layer of a dual gate electrode having a tungsten polycide layer.

REFERENCES:
patent: 5441914 (1995-08-01), Taft et al.
patent: 5506166 (1996-04-01), Sandhu et al.
patent: 5559047 (1996-09-01), Urabe
patent: 5597745 (1997-01-01), Byun et al.
patent: 5633196 (1997-05-01), Zamanian
patent: 5668040 (1997-09-01), Byun

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