Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-04-18
2003-07-15
Thomas, Tom (Department: 2811)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S738000, C438S734000, C438S713000, C438S701000, C438S672000, C438S640000, C438S689000
Reexamination Certificate
active
06593235
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device having a multi-layer wiring structure and, more specifically, to a method of forming contact holes through an interlayer insulating film.
2. Description of the Related Art
In a semiconductor device having a multi-layer wiring structure, upper-layer wiring lines (interconnections) and lower-layer wiring lines are connected to each other such that contact holes are formed through an interlayer insulating film that is formed on the lower-layer wiring lines and the upper-layer wiring lines are formed through the contact holes.
Conventionally, contact holes are required to be tapered to improve the step coverage of upper-layer wiring lines at contact holes. Japanese Unexamined Patent Publication No. 50-123274 discloses a method of tapering a contact hole by forming an interlayer insulating film as two-layer silicon films that are respectively formed through thermal oxidation and CVD and utilizing an etching rate difference between the two layers due to the different methods of forming those layers.
When part of an interlayer insulating film is formed through thermal oxidation as in the conventional example, heating is performed at a temperature of 500° C. or more. However, in semiconductor devices such as a thin-film transistor, a wiring line under an interlayer insulating film, that is, a gate electrode is made of aluminum, which tends to diffuse into the surrounding portions when heated at a temperature of 450° C. or more. If diffused aluminum passes through a gate insulating film under the gate electrode and further goes into a semiconductor layer under the gate insulating film, there may occur a failure in operation or short-circuiting. For this reason, in a semiconductor device in which a lower-layer wiring line is formed with aluminum, thermal oxidation cannot be employed. Therefore, an interlayer insulating film is formed in a single-layer structure only through CVD method.
To form a tapered contact hole through an interlayer insulating film of a single-layer structure, etching conditions such as an etching time need to be controlled strictly. For example, the etching time is too long, the side wall of a contact hole becomes vertical to the bottom surface, that is, the contact hole cannot be tapered, possibly resulting in disconnection of a wiring line.
Further, to etch an interlayer insulating film completely, overetching of several tens of seconds is generally performed. This may cause a problem that a wedge-shaped recess is formed between a semiconductor layer of a source/drain region and the interlayer insulating film.
Referring to
FIG. 4A
, reference numeral
401
denotes a crystalline silicon semiconductor layer and numeral
402
denotes an interlayer insulating film that is a single-layer oxide film. In forming a contact hole by etching a desired portion of the interlayer insulating film
402
, if there exists a protrusion of dust or the like between the semiconductor layer
401
and the interlayer insulating film
402
, an etching liquid may soak through it, resulting in the formation of a wedge-shaped recess
403
. As an example of the dust, an oxide or fluoride of aluminum which constitutes an aluminum wiring has been recognized by the inventors of the present invention.
In this case, when a wiring electrode
404
is formed as shown in
FIG. 4B
, it is difficult to cover the wedge-shaped recess
403
, possibly resulting in disconnection of the wiring line.
FIGS. 9A and 9B
are SEM photographs showing the structure of FIG.
4
.
FIG. 9B
is an enlarged view of an encircled portion of FIG.
9
A. In
FIG. 9B
, reference numerals
404
a
and
404
b
are a titanium wiring and an aluminum wiring, respectively.
Where a pixel area or a peripheral driver circuit of an active matrix liquid crystal display device is formed by using thin-film transistors, several hundred to several thousand thin-film transistors are formed on the same substrate at the same time. Since disconnection of a wiring line even in a single thin-film transistor may lead to a failure of the entire substrate, the production yield will be reduced.
SUMMARY OF THE INVENTION
An object of the present invention is to provide, by solving the above problems, a manufacturing method of a semiconductor device which method can form, by a common etching method, a tapered contact hole through an interlayer insulating film formed only by CVD.
Another object of the invention is to improve the production yield of semiconductor devices by forming contact holes that are free of recesses and enable good coverage of wiring lines.
To solve the above problems, according to a first aspect of the invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of:
forming a metal conductive layer or a semiconductor layer;
forming an insulating film by CVD so that it covers the metal conductive layer or the semiconductor layer, and that an etching rate of the insulating film increases continuously or in a step-like manner as a position goes up by varying film forming conditions continuously or in a step-like manner; and
forming a contact hole by etching a desired portion of the insulating film.
According to a second aspect of the invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of:
forming a metal conductive layer or a semiconductor layer;
forming an insulating film by CVD so that it covers the metal conductive layer or the semiconductor layer, and that an etching rate of the insulating film increases continuously or in a step-like manner as a position goes up; and
forming a contact hole by etching a desired portion of the insulating film.
According to a third aspect of the invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of:
forming an active layer on a substrate surface;
forming a first insulating film on the active layer;
forming a wiring layer on the first insulating film;
exposing a desired surface portion of the active layer by etching the first insulating film;
forming a second insulating film by CVD so that it covers the exposed surface portion of the active layer and the wiring layer, and that an etching rate of the second insulating film increases continuously or in a step-like manner as a position goes up; and
forming a contact hole by etching a desired portion of the second insulating film.
According to a fourth aspect of the invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of:
forming a wiring layer with aluminum or metal mainly made of aluminum;
forming an insulating film by CVD so that it covers the wiring layer, and that an etching rate of the insulating film increases continuously or in a step-like manner as a position goes up; and
forming a contact hole by etching a desired portion of the insulating film.
According to a fifth aspect of the invention, there is provided a manufacturing method of a semiconductor device, comprising the steps of:
forming a metal conductive layer or a semiconductor layer;
forming an insulating film by CVD so that it covers the metal conductive layer or the semiconductor layer, a lowermost layer of the insulating film being a silicon nitride film of 200 to 500 Å in thickness; and
forming a contact hole by etching a desired portion of the insulating film.
The silicon nitride film may be formed through plasma CVD by using silane (SiH
4
), ammonia (NH
3
), and nitrogen (N
2
) as material gases. It is desired that the silicon nitride film be so dense as to be etched by buffered hydrofluoric acid at a rate of 800 to 1,000 Å/min.
In the manufacturing method of a semiconductor device according to the first aspect of the invention, in forming an insulating film by CVD so that it covers the metal conductive layer or the semiconductor layer, the film forming conditions are varied continuously or in a step-like manner so that the etching rate of the insulating fil
Hayakawa Masahiko
Konuma Toshimitsu
Sakama Mitsunori
Uochi Hideki
Yamazaki Shunpei
Fish & Richardson P.C.
Magee Thomas
Semiconductor Energy Laboratory Co. Ltd
Thomas Tom
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