Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2002-01-11
2003-01-07
Chaudhuri, Olik (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S413000
Reexamination Certificate
active
06503812
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority from prior French Patent Application No. 0100416, filed Jan. 12, 2001, the disclosure of which is hereby incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor devices with silicon-on-insulator (SOI) substrates and more particularly to semiconductor devices formed with SOI isolation zones.
2. Description of Related Art
At the present time, the semiconductor substrate within which one or more integrated circuits are formed may be of various types. Thus, it is possible to form what is well known to those skilled in the art as a silicon-on-insulator (SOI) substrate. Such a silicon-on-insulator substrate is then formed from a silicon layer within which the integrated circuit or circuits will be formed, the silicon layer being isolated from the lower part of the semiconductor wafer by an insulating film, such as silicon dioxide. Integrated circuits, for example bipolar transistors for radio-frequency applications, are formed within such substrates. The performance of the integrated circuits are improved by an SOI-type isolation.
It is also possible to form so-called “conventional” semiconductor substrates, that is to say substrates of the bulk type, i.e. substrates within which there are active zones separated from other zones by isolating regions, for example of the STI (shallow trench isolation) type. Integrated circuits using an SOI-type structure, for example MOS transistors, are formed within such substrates.
At the present time, a semiconductor substrate able to include both zones entirely isolated by an insulating material, for example silicon dioxide, and “conventional” bulk-type zones is not known.
Accordingly, a need exists to provide a semiconductor substrate with both isolated regions i.e., “conventional” semiconductor bulk-type zones and SOI-type isolation zones.
SUMMARY OF THE INVENTION
The present invention provides both conventional bulk-type zones and SOI-type zones entirely isolated by an insulating material on the same semiconductor substrate. Stated differently, the present invention provides both zones entirely isolated by an insulating material and conventional bulk-type zones on the same semiconductor substrate or wafer.
The invention therefore provides a semiconductor device comprising a semiconductor substrate having locally at least one zone terminating in the surface of the substrate and entirely bordered, along its lateral edges and its bottom, by an insulating material so as to be completely isolated from the rest of the substrate.
According to one embodiment of the invention, the insulating material comprises a vertical isolating layer, bearing on the lateral edges of a local zone, and a horizontal isolating layer, of approximately constant thickness, bearing on the bottom of the zone and connected to the vertical isolating layer.
According to another embodiment off the invention, more particularly applicable to local zones of large width, the insulating material comprises a vertical isolating layer, bearing on the lateral edges of the local zone, and a crenellated horizontal isolating layer bearing on the bottom of the zone and connected to the vertical isolating layer.
In one embodiment, the substrate and the local zone are formed from silicon and the insulating material formed from silicon dioxide, or else from any insulating material, for example materials having a low dielectric constant.
The invention also provides a process for fabricating a semiconductor substrate comprising locally at least one zone terminating in the surface of the substrate and entirely bordered, along its lateral edges and its bottom, by an insulating material so as to be completely isolated from the rest of the substrate. The process according to the invention comprises:
a first step in which a horizontal layer is formed in an initial substrate, the horizontal layer being formed from the insulating material and terminating in the surface of the initial substrate;
a second step in which a semiconductor layer called a covering layer is formed on the surface of the initial substrate and on the surface of the horizontal layer; and
a third step in which a vertical layer formed from the insulating material is formed in the semiconductor covering layer, the vertical layer being connected to the isolating horizontal layer and terminating in the surface of the semiconductor covering layer. That part of the semiconductor covering layer bordered externally by the horizontal and vertical layers of the insulating material then forms the local zone completely isolated from the rest of the substrate.
According to a first method of implementing the invention, an isolating horizontal layer of approximately constant thickness is formed in the first step.
In this regard, the formation of the horizontal layer advantageously includes the formation of a trench in the initial substrate and the filling of the trench with the insulating material.
According to another method of implementing the invention, a crenellated isolating horizontal layer is formed in the first step.
In this regard, the formation of the crenellated isolating horizontal layer advantageously comprises the following sub-steps:
the formation in the initial substrate of a row of several first adjacent trenches mutually separated by first portions of the initial substrate;
the filling of the first trenches with the insulating material;
the formation of a semiconductor layer, called an intermediate layer, on the initial substrate and on the filled first trenches;
the formation of a row of several second adjacent trenches in the intermediate semiconductor layer, the second trenches being mutually separated by second portions of the intermediate semiconductor layer, at least some of the second trenches bearing on two immediately adjacent first trenches and on the first portion of the initial substrate separating these two immediately adjacent first trenches, respectively; and
the filling of the second trenches with the insulating material.
The intermediate semiconductor layer may be formed by epitaxy. Moreover, in order to ensure the minimum number of defects during the epitaxy, it is preferable that the formation of this intermediate semiconductor layer comprise a phase of amorphizing the surface of the initial substrate, the deposition of an auxiliary semiconductor layer on the amorphous surface of the initial substrate and on the filled first trenches, a phase of recrystallizing the auxiliary. semiconductor layer and the epitaxy of the intermediate semiconductor layer on the crystallized auxiliary layer.
Whatever the implementation variants used, the formation of the semiconductor covering layer may also comprise epitaxy. However, also for the purpose of minimizing the defects in the epitaxially grown structure, it is preferable that this epitaxy be preceded by a phase of amorphizing and of recrystallizing an auxiliary semiconductor layer. More specifically, if the horizontal isolating layer is an isolating layer of approximately uniform thickness, the formation of the semiconductor covering layer advantageously comprises a phase of amorphizing the surface of the initial substrate, the deposition of an auxiliary semiconductor layer on the amorphous surface of the initial substrate and on the filled trench, a phase of recrystallizing the auxiliary semiconductor layer and the epitaxy of the semiconductor covering layer on the recrystallized auxiliary semiconductor layer.
If the horizontal isolating layer is a crenellated layer, formation of the semiconductor covering layer advantageously comprises a phase of amorphizing the surface of the intermediate semiconductor layer, the deposition of an auxiliary semiconductor layer on the amorphous surface of the intermediate semiconductor layer and on the filled second trenches, a phase of recrystallizing the auxiliary semiconductor layer and the epitaxy of the semiconductor covering layer on the recryst
Bouche Guillaume
Jaouen Herve
Menut Olivier
Blum David S
Fleit, Kain, Gibbons, Gutman & Bongini P. L.
Gibbons Jon A.
Jorgenson Lisa K.
STMicroelectronics S. A.
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