Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-01-12
2003-03-18
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S646000, C438S648000, C438S656000, C438S660000, C438S692000, C438S710000
Reexamination Certificate
active
06534398
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the formation of a layer of metal on a substrate and, in particular, to the formation of an anti-reflective.coating (ARC) and/or ARC-containing layer that has a reduced roughness. More particularly, the present invention relates to the formation of a titanium- and/or tungsten-containing ARC layer on an aluminum- or aluminum alloy-containing metallization layer in an integrated circuit.
2. Description of the Related Art
Some metal deposition processes result in formation of grain boundaries in the deposited metal layer. Such grain boundaries may give rise to localized sites of high reactivity in the metal layer.
In particular, in integrated circuit fabrication, aluminum tends to be somewhat reactive with subsequently deposited titanium-tungsten alloy, particularly when the substrate is at a relatively high temperature (e.g., 480° C.). This often results in localized formation of a TiWAl phase at the aluminum grain boundaries, causing formation of TiWAl “bumps” on the surface of the deposited aluminum layer.
FIG. 1
is a cross-sectional representation of one such TiWAl “bump” at a grain boundary, as formed using a conventional process. As shown therein, numeral
110
references a grain boundary of a metallization layer
105
, such as aluminum. As the ARC layer, such as TiW, is conventionally formed at high temperatures, deposition of a TiW layer
130
on the metallization layer
105
causes an underlying intermetallic phase
120
of TiWAl to be formed. Such an intermetallic phase
120
of TiWAl tends to form one or more “bumps”
140
above the reactive grain boundary. Because of these “bumps”
140
of intermetallic phase TiWAl
120
, the overlying ARC layer
130
of TiW exhibits one or more corresponding “bumps”
150
. These “bumps”
150
increase the surface roughness of the aluminum layer
105
, causing problems during subsequent photolithography and metal etching processes. In the worst case, the “bumps”
140
,
150
may be sufficiently large to adversely affect the yield of the metallization process and/or of the entire integrated circuit fabrication process.
It is, therefore, desirable to provide a method of forming an anti-reflective coating (ARC) and/or ARC-containing metal layer on a substrate that reduces the roughness of the coating or layer. More particularly, it is desirable to provide a method of forming a titanium- and/or tungsten-containing ARC layer on an aluminum- or aluminum alloy-containing metal layer in an integrated circuit, where the ARC layer may have a relatively uniform thickness and/or where the metal layer containing the ARC layer has a reduced roughness relative to similar metal layers formed by conventional processes.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method of forming an anti-reflective coating (ARC) and/or ARC-containing metal layer on a substrate that reduces the roughness of the coating or layer. More particularly, it is an object of the present invention to provide a method of forming a titanium- and/or tungsten-containing ARC layer on an aluminum- or aluminum alloy-containing metal layer in an integrated circuit, where the ARC layer may have a relatively uniform thickness and/or where the metal layer containing the ARC layer has a reduced roughness relative to similar metal layers formed by conventional processes.
In accordance with the above-described objects and those that will be mentioned and will become apparent below, a method of forming metallic layers on a substrate, according to an embodiment of the present invention, comprises the steps of:
forming a first layer comprising a first metal on the substrate,
cooling the first layer for a period of time sufficient to suppress formation of an intermetallic phase, and
forming a second layer comprising a second metal distinct from said first metal on the first layer.
According to further preferred embodiments, the first layer forming step may be preceded by a wetting layer forming step. The first layer may include one or more elements selected from the group consisting of aluminum, gold, silver, copper, indium, tantalum, molybdenum and tungsten. The first layer forming step may be carried out at a temperature of at least 350° C., preferably between about 350° C. and about 550° C. and more preferably between about 400° C. and about 500° C., and even more preferably between about 450° C. and about 480° C. The cooling step may be carried out for a period of time at least equal to 30 seconds. The cooling step may cool the first layer to about 300° C. or below and preferably to a temperature equal to or less than 250° C. The intermetallic phase may include at least one element from each of the first and second metallic layers. The second layer may include at least one refractory metal, which may include one or more elements selected from the group consisting of tungsten, nickel, molybdenum, tantalum and titanium. The cooling step may be carried out by flowing an inert gas near the first layer or the substrate, at a temperature effective to cool the first layer. The inert gas may be selected from the group consisting of nitrogen, helium and argon and may be flowed at a flow rate selected within a range of from about 35 sccm to about 65 sccm.
According to another embodiment, a method of reducing a surface roughness of a stacked structure including at least a first and a second metal layer comprises the steps of:
depositing the first metal layer at a first temperature;
cooling tile first metal layer to a second temperature that is less than the first temperature, the second temperature being effective to suppress formation of an intermediate layer between the first and second metal layers that includes at least one element from the first metal layer and at least one element from the second metal layer; and
depositing the second metal layer.
According to still further embodiments, the first temperature may be at least equal to about 350° C. and the second temperature may be equal to or lower than about 300° C. The first metal layer may include aluminum and the second metal layer may include titanium and/or tungsten. The first metal layer may be deposited in a process chamber at a first power level and the cooling step may be carried out at a second power level that may be less than the first power level. The second power level may be substantially equal to zero.
According to another preferred embodiment, a stacked structure including at least a metallization layer and an overlying anti-reflective coating may be produced by carrying out the steps of depositing the metallization layer on a substrate; cooling the metallization layer for at least 30 seconds, and depositing the anti-reflective coating on the cooled metallization layer. The metallization layer may include one or more metals suitable to form an electrical interconnect and the anti-reflective layer may include one or more refractory metals.
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Geha Sam G.
Lau Gorley
Shan Ende
Cypress Semiconductor Corp.
Smith Matthew
Sonnenschein Nath & Rosenthal
Yevsikov V.
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