Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2001-03-07
2003-07-22
Chowdhury, Tarifur R. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S043000, C349S044000, C349S122000, C349S138000, C257S059000
Reexamination Certificate
active
06597415
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a thin film transistor liquid crystal display, more specifically to a thin film transistor liquid crystal display whose black matrix is formed on a thin film transistor substrate.
(b) Description of the Related Art
Most liquid crystal displays include a thin film transistor (TFT) substrate and a color filter substrate. Black matrix is generally formed on the color filter substrate and is used to shield the light leakage in the portions between pixels. However, misalignment between the TFT substrate and the color filter substrate may make it hard to shield the light leakage perfectly. For that reason, a method of forming the black matrix on TFTs, which is called black matrix on TFT (BM on TFT), was recently suggested.
FIG. 1
illustrates a cross-sectional view of a conventional BM on TFT type TFT substrate.
As shown in
FIG. 1
, a gate electrode
2
and a storage capacitor electrode
3
are formed on a transparent substrate
1
. A gate insulating layer
4
is formed on the gate electrode
2
and the storage capacitor electrode
3
. An amorphous silicon layer
5
, an etch stopper layer
6
and an n+ amorphous silicon layer
7
are deposited sequentially on the gate insulating layer
4
over the gate electrode
2
. A source electrode
8
and a drain electrode
9
are formed on the n+ amorphous silicon layer
7
, and the source electrode
8
is connected to a data line (not shown). The gate electrode
2
, the gate insulating layer
4
, the amorphous silicon layer
5
, the n+ amorphous silicon layer
7
, the source electrode
8
and the drain electrode
9
form a TFT. A passivation layer
10
is formed on the TFT and the gate insulating layer
4
, and a black matrix
11
is formed on the passivation layer
10
over the TFT. A pixel electrode
12
made of ITO (indium tin oxide) is formed on the passivation layer
10
in a pixel region, and connected to the drain electrode
9
through a contact hole in the passivation layer
10
.
Because the pixel electrode
12
is close to the data line, coupling capacitance is generated between the pixel electrode
12
and the data line when the liquid crystal display is in operation, and the coupling capacitance distorts the display signal.
Since the black matrix
11
is formed on the TFT, the height difference between the portions near the TFT and the pixel electrode
12
can become larger to make defects of the alignment layer, thereby causing leakage. Although the light leakage may be reduced by increasing the width of the black matrix, in this case, the aperture ratio may decrease.
On the other hand, liquid crystal displays comprise two spaced parallel substrates and a liquid crystal layer therebetween. Spacers are inserted between the substrates to keep the cell gap, which is the thickness of the liquid crystal layer injected between two substrates, to be constant. It is common to use spherical spacers having uniform size, and the spacers are uniformly distributed on the pixel electrode
12
. Because of the height difference in the color filter substrate and in the TFT substrate, it may be difficult to make a uniform cell gap. Therefore, the thickness of the liquid crystal layer becomes non-uniform, and display characteristics become worse. Moreover, the spacers on the pixel electrode
12
may cause a defect in the alignment layer and may cause the light from the backlight unit to be scattered, thereby causing the low transmittance of the liquid crystal cell and the light leakage.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to allow a reduction in the coupling capacitance generated between a data line and a pixel electrode.
It is another object of the present invention to allow a reduction in the defect of the alignment layer.
It is yet another object of the present invention to allow an increase in the aperture ratio of liquid crystal display.
It is still another object of the present invention to allow the cell gap of a liquid crystal display to be uniform.
It is another object of the present invention to allow an increase in the transmittance and a decrease in the light leakage by reducing the scattering of the back light.
These and other objects, features and advantages are provided, according to the present invention, by a liquid crystal display having a passivation layer made of a flowable insulating material. It is preferable that the flowable insulating material is an organic insulating material and has dielectric constant of 2.4-3.7. The passivation layer having a flat surface is formed on gate lines, data lines and TFTs in a TFT substrate to prevent the interference between signals of a pixel electrode formed on the passivation layer and of a data line formed under the passivation layer.
A portion of the passivation layer on gate lines, data lines and TFTs is removed to make a groove, and a black matrix made of an organic black photoresist is filled in the groove.
The thickness of the passivatlon layer is preferably 2.0-4.0 &mgr;m to have sufficient insulating characteristics, and the thickness of the black matrix is preferably 0.5-1.7 &mgr;m.
In the pixel region, storage capacitor electrode is formed on a transparent substrate to form a storage capacitor with the pixel electrode on the passivation layer. To increase the storage capacitance, the portion of the passivation layer on the storage capacitor electrode is thinned or removed.
Another way to compensate the storage capacitance is, for example, to thin a portion of a gate insulating layer between the storage capacitor electrode and the pixel electrode. In another embodiment, a contact hole exposing the storage capacitor electrode is formed in the gate insulating layer, and a metal pattern is formed on the gate insulating layer and connected to the storage capacitor electrode through the contact hole. Another embodiment provides a metal pattern connected to the pixel electrode that may be formed on a portion of the gate insulating layer on the storage capacitor electrode.
A flowable insulating layer is also used as a gate insulating layer such that the gate insulating layer may have a flat surface, and thus the parasitic capacitance between a gate electrode and a drain electrode can be reduced. A silicon nitride layer may be formed between the flowable gate insulating layer and a semiconductor layer made of amorphous silicon to prevent the interfacial characteristics of the amorphous silicon layer from being deteriorated. It is preferable that an organic insulating material is used and the thickness of the organic gate insulating layer is preferably 2,500-5,500 Å. It is preferable that the thickness of the silicon nitride layer is 500-800 Å.
In the case of an etch stopper type TFT substrate, a photo definable material is used as an etch stopper layer to decrease the parasitic capacitance between a gate electrode and a drain electrode and to make process simple. It is preferable that an organic material is used and the thickness of the etch stopper layer is 3,000-5,000 Å.
To keep a cell gap between a TFT substrate and a color filter substrate, spacers made of a photo definable organic material are formed on the color filter substrate. The spacers are formed between color filters, and they are formed at the position corresponding to TFTs on the TFT substrate.
To make a TFT substrate according to the present invention, a flowable insulating layer which is to form a gate insulating layer is coated on a substrate having a gate electrode. A silicon nitride layer is deposited on the flowable insulating layer. A semiconductor layer in formed on the silicon nitride layer and the silicon nitride layer is etched away except the portion under the semiconductor layer.
When an etch stopper layer is made of a photo definable material, a photo definable organic layer is coated on the semiconductor layer and patterned to form an etch stopper layer. The process of patterning the etch stopper layer includes the steps of exposing the organic laye
Lee Jung-Ho
Rho Soo-Guy
Chowdhury Tarifur R.
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
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