Flip-chip semiconductor package structure and process for...

Details Flip-chip semiconductor package structure and process for... Flip-chip semiconductor package structure and process for...

2002-05-06

2003-07-29

Cuneo, Kamand (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S787000

Reexamination Certificate

active

06600232

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor packaging technology, and more particularly, to a flip-chip semiconductor packaging technology that can be used for the fabrication of a flip-chip package structure having increased structural robustness to prevent package warpage as well as having increased heat-dissipation efficiency.
2. Description of Related Art
The flip-chip packaging technology is an advanced semiconductor packaging technology which differs from conventional technology particularly in that the chip is mounted in an upside-down manner over the substrate and electrically coupled to the same by means of the ball-grid array (BGA) technology After the flip chip is readily bonded in position, however, a gap would be undesirably left between the chip and its underlying surface, which, if not underfilled, would easily cause the flip chip to suffer from fatigue cracking and electrical failure due to thermal stress when the entire package structure is being subjected to high-temperature conditions. As a solution to this problem, it is an essential step in flip-chip package fabrication to fill an underfill material, such as resin, into such a gap. The underfilled resin, when hardened, can serve as a mechanical reinforcement for the flip chip to cope against thermal stress. The involved fabrication process is customarily referred to as flip-chip underfill. A conventional flip-chip package fabrication process is briefly depicted in the following with reference to
FIGS. 1A-1B
.
Referring to
FIG. 1A
, by the conventional process, the first step is to prepare a substrate
10
, which is typically made of an organic material. Next, a semiconductor chip
20
is mounted in a flip-chip manner over the substrate
10
, and which is mechanically bonded and electrically coupled to the substrate
10
by means of a plurality of solder balls
30
. Due to the existence of these solder balls
30
, however, a gap
20
a
is undesirably left under the flip chip
20
. This gap
20
a
, if not underfilled, would easily cause the flip chip
20
to suffer from fatigue cracking and electrical failure due to thermal stress when the entire package structure is being subjected to high-temperature conditions during subsequent fabrication steps.
Referring further to
FIG. 13
, as a solution to the foregoing problem, a dispensing needle
40
is used to dispense an underfill material, such as resin
41
, onto the substrate area beside the gap
20
a
. The dispensed resin
41
will then fill into the gap
20
a
through capillary action. After the underfill process is finished however, the underfill resin
41
would have a fillet part
41
a
spread beyond the gap
20
a
. The width of this underfill fillet part
41
a is roughly proportional to the height of the gap
20
a
under the chip
20
and the amount of the dispensed resin
41
, as depicted in the following with reference to
FIGS. 2A-2B
.
FIG. 2A
shows the case of the chip
20
having a gap height of H
1
and an underfill fillet width of W
1
, while
FIG. 2B
shows the case of the chip
20
having a gap height of H
2
and an underfill fillet width of W
2
; if H
1
<H
2
, then W
1
<W
2
. This means that the conventional flip-chip package fabrication process, when utilized with various package sizes, would result in different underfill fillet widths. During the fabrication process, if the underfill fillet width is overly small or overly large, it would all make the flip chip
20
and the substrate
10
easily subjected to warpage due to thermal stress and would thus degrade the quality and reliability of the finished package product.
In view of the foregoing drawback, there exists a need for a new flip-chip package fabrication process that can help the fillet part of the underfilled resin to be fixed to a specific width irrespective of the height of the flip chip's underneath gap.
Beside the fillet-width problem, conventional flip-chip package structures would suffer from package warpage due to the substrate being made of organic material which is typically flexible. A solution to this problem is disclosed in the U.S. Pat. No. 6,020,221 entitled “PROCESS FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A STIFFENER MEMBER”. This patent discloses the use of a stiffener member attached to the substrate, which not only can serve as a mechanical reinforcement for the substrate to prevent package warpage, but also can serve as a heat-dissipation means to dissipate the chip-produced heat during active operation. This patent, however, is not useful to provide a specific underfill fillet width, and would be therefore still easily subjected to package warpage when the underfill fillet width is made overly small or overly large.
SUMMARY OF THE INVENTION
It is therefore an objective of this invention to provide a new flip-chip packaging technology, which allows the underfilled resin underneath the flip chip to have a predetermined fixed underfill fillet width.
It is another objective of this invention to provide a new flip-chip packaging technology, which can provide additional mechanical reinforcement to the substrate so as to allow the package structure to be more robust to prevent package warpage.
It is still another objective of this invention to provide a new flip-chip packaging technology, which allows the flip-chip package structure to have increased heat-dissipation efficiency.
In accordance with the foregoing and other objectives, the invention proposes a new flip-chip packaging technology.
The flip-chip packaging technology of the invention provides a new package structure which, broadly defined, comprises the following constituent parts: (a) a substrate, (b) a semiconductor chip mounted over the substrate through flip-chip technology, with a gap existing between the semiconductor chip and the substrate; (c) a metal dam formed around the semiconductor chip over the substrate, the metal dam being dimensioned to a predetermined thickness and separated from the semiconductor chip by a fillet area of a predetermined width; and (d) an underfill layer formed in the gap under the semiconductor chip, the underfill layer having a fillet part lying over the fillet area.
Moreover, the flip-chip packaging technology of the invention provides a new package fabrication process which comprises the following procedural steps: (1) preparing a substrate having a center area predefined as a die-bonding area; (2) forming a metal dam around the die-bonding area over the substrate, the metal dam being dimensioned to a predetermined thickness and separated from the die-bonding area by a fillet area of a predetermined fillet width; (3) mounting a semiconductor chip onto the die-bonding area over the substrate through flip-chip technology, and in which process a gap is undesirably left between the semiconductor chip and the substrate; and (4) dispensing an underfill material onto the fillet area; the dispensed underfill material subsequently filling into the gap between the semiconductor chip and the substrate through capillary action, thereby forming an underfill layer having a fillet part over the fillet area, with the width of the fillet part being substantially equal to the predetermined width of the fillet area.
It is a characteristic feature of the invention that the metal dam alone can serve three different utilization purposes. First, the metal dam can help provide a specific fillet width to the underfill layer under the flip chip so as to allow the joint between the flip chip and the substrate to have increased robustness against thermal stress. Second, the metal dam can serve as a mechanical reinforcement to the substrate to prevent package warpage. Third, the metal dam can additionally serve as a heat-dissipation structure to help heat dissipation from the flip chip. These benefits allow the finished package product to be highly assured in quality and reliability.


REFERENCES:
patent: 6228679 (2001-05-01), Chiu
patent: 6380620 (2002-04-01), Suminoe et al.
patent: 6410981 (2002-06-01), Tao

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