Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2002-04-30
2003-01-28
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S113000
Reexamination Certificate
active
06513102
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates generally to the transfer of data from one storage element to another, and more particularly, to a method and apparatus for reducing host computer involvement in the transfer operation.
As host computers become more and more powerful, as well as more complex, it is important to maintain the primary focus of the host computer on activities other than peripheral data handling. In particular, in a copy or transfer from one disk drive unit to another, the host computer can, and will, spend a considerable time simply reading data from one disk drive unit into its own-memory and then writing the data from its own memory to a second disk drive unit. This activity can occupy not only substantial host computer CPU cycles but, in addition, substantial amounts of bus bandwidth. Such a resource use is especially intrusive if the bus bandwidth is low or small, or, if the transfer rate from the disk drive controller is high.
Thus, in addition to freeing up CPU time at the host computer, it is desirable to reduce the data transfer activity from a disk drive controller to the host computer, leaving the communications channel available for other operations. When a SCSI bus is used, other peripherals on the bus can then be given considerably greater access to the bus.
SUMMARY OF THE INVENTION
The invention relates to a storage system which has a storage controller connected to a plurality of storage devices. The invention of the system and method features operating the system to transfer physical data from a first storage device to a second storage device. The method does not involve the host computer in the physical data transfer thereby saving both computer CPU time and system bandwidth. The method features receiving an internal copy command from a commanding processor over a controller input path, reading at least one block of data, in data block format, from the first storage device, storing the requested data in a volatile memory in the controller setting a state of the pending stored data as a write pending state, and destaging the write pending memory stored data to the second storage device.
The storage system, according to the invention, features a storage controller having a cache memory, at least one input port and at least a first and a second output port. The system further features a control processor connected to the at least one input port and two output ports. The at least two output ports connect to storage devices. The controller receives a transfer command from the outside source at the input port. The control processor responds to the transfer command by reading blocks of data specified in the command from a storage device connected to the first output port and storing the read data in the cache memory. The control processor associates a write pending flag with the stored read data. The control processor further destages the stored read data blocks to a storage device connected to the second output port.
In a particular aspect, the invention relates to a system for transferring data from a first storage device, accessible to a first command processor, to a second storage device accessible to a second command processor but not necessarily the first. In this aspect of the invention, the transfer is made internally of the storage controller rather than requiring the command processors to communicate directly with each other. Advantageously, this allows processors using different operating systems, otherwise incompatible with each other, to easily and quickly transfer data therebetween without the need for each of the command processors to be tied up in the physical transfer of the data.
The invention, thereby, advantageously provides a command processor or host computer with the additional selected ability to transfer data without itself being involved in the physical transfer process. In addition to saving computer time, bus transfer bandwidth is also made available for other devices. In particular aspects of the invention, otherwise incompatible processors are able to transfer data between storage devices to which they would otherwise not have access.
REFERENCES:
patent: 4506323 (1985-03-01), Pusic et al.
patent: 5341493 (1994-08-01), Yanai et al.
patent: 5418763 (1995-05-01), Ichikawa et al.
patent: 5544347 (1996-08-01), Yanai et al.
patent: 5581740 (1996-12-01), Jones
patent: 5615330 (1997-03-01), Taylor
patent: 5781908 (1998-07-01), Williams et al.
patent: 5787487 (1998-07-01), Hashimoto et al.
patent: 5829045 (1998-10-01), Motoyama
patent: 5835954 (1998-11-01), Duyanovich et al.
patent: 6230239 (2001-05-01), Sakaki et al.
patent: 6408369 (2002-06-01), Garrett et al.
Garrett Brian
Kopylovitz Haim
Moreshet Hana
EMC Corporation
Gunther John M.
Nguyen Hiep T.
Wilson Penelope S.
LandOfFree
Internal copy for a storage controller does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Internal copy for a storage controller, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Internal copy for a storage controller will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3047592