Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2001-10-01
2003-01-28
Tran, M. (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S148000
Reexamination Certificate
active
06512688
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a device for evaluating a magnetically variable electrical resistance of a magneto resistive memory cell (MRAM) with the aid of a reference resistance. Such a memory cell typically has a soft-magnetic layer and a hard-magnetic layer, which are electrically conductive and isolated from one another by a tunnel oxide, the tunneling probability and thus the electrical resistance depends on the directions of polarization of the two layers.
Such a device is disclosed in U.S. Pat. No. 5,173,873, in particular in FIG. 4, for each column the resistance of a single reference cell is used for evaluating a memory cell and an evaluation takes place rapidly and with a low power loss as a result.
On account of the fabrication tolerances, the cell resistances are not constant over the entire memory cell array and different output voltages occur for the same information state after the performance of a resistance/voltage conversion by an evaluation circuit, which output voltages can often no longer be correctly assigned by a decision circuit connected downstream.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a device for evaluating cell resistances in a magneto resistive memory that overcomes the above-mentioned disadvantages of the prior art device of this general type, in which high offset voltages, which are critical in particular for new components with low voltage levels and a low power loss, are eliminated in the evaluation device.
With the foregoing and other objects in view there is provided, in accordance with the invention, a magneto resistive memory. The memory contains first switches, a word line voltage source generating a word line voltage connected to the first switches, a line node, second switches, and cells formed of cell resistors each having a first terminal connected to the word line voltage through one of the first switches and a second terminal connected to the line node through one of the second switches. A reference resistor is connected to the line node and a reference voltage source is connected to the reference resistor. The reference resistor with the reference voltage source brings about a reduction in a respective cell current, flowing from the line node, by an average current. A device is connected to the line node and evaluates the cell resistors. The device has an amplifier for converting a difference between the respective cell current and the average current into a voltage functioning as an evaluation signal.
In accordance with an added feature of the invention, the reference resistor is formed from an interconnection of the cell resistors of the cells containing different information contents.
In accordance with another feature of the invention, the reference resistor is formed from a single series circuit containing two of the cell resistors of the cells each having a different information content. Alternatively, the reference resistor is formed from a parallel circuit of series circuits each containing two of the cell resistors of the cells each having a different information content.
In accordance with a further feature of the invention, the reference voltage source outputs a reference voltage formed from the word line voltage with an aid of an inverting voltage amplifier circuit.
In accordance with a concomitant feature of the invention, the reference voltage source outputs a reference voltage, and the word line voltage is formed from the reference voltage with an aid of an inverting voltage amplifier circuit.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a device for evaluating the cell resistances in a magneto resistive memory, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 5493533 (1996-02-01), Lambrache
patent: 5654566 (1997-08-01), Johnson
patent: 6021065 (2000-02-01), Daughton et al.
International Search Report for PCT/DE00/00778, issued by the European Patent Office on Jul. 24, 2000.
Thewes Roland
Weber Werner
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
Tran M.
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