Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-02-07
2003-09-30
Booth, Richard (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S486000, C438S487000
Reexamination Certificate
active
06627487
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor circuit having a plurality of thin-film transistors (TFTs) and a manufacturing method thereof. The semiconductor circuit that is manufactured according to the invention is formed on either an insulating substrate such as glass or a semiconductor substrate such as single crystal silicon. In particular, the present invention is effectively applied to a semiconductor circuit, such as a monolithic active matrix circuit (used in, for instance, a liquid crystal display), having a matrix circuit that is required to have a small off-current with a small variation and peripheral circuits for driving it which are required to operate at high speed and to have a small-variation on-current.
2. Description of the Prior Art
In recent years, various studies have been made of insulated-gate semiconductor devices having a thin-film active layer (also called an active region) on an insulating substrate. In particular, thin-film insulated gate transistors, i.e., thin-film transistors (TFTs), have been studied eagerly. The TFTs, which are formed on a transparent, insulating substrate, are intended to be used for controlling individual pixels in a display device having a matrix structure such as a liquid crystal display. The TFTs are classified into an amorphous silicon TFT, a crystalline silicon TFT, etc. depending on a semiconductor material used and its crystal state.
In general, having a small field-effect mobility, amorphous semiconductors cannot be used for a TFT that is required to operate at high speed. Therefore, to manufacture circuits having higher performance, crystalline silicon TFTs have been studied and developed recently. As methods for obtaining a crystalline silicon film, there are known methods in which amorphous silicon is thermally annealed for a long time at a temperature of about 600° C. or higher, and an optical annealing method in which amorphous silicon is illuminated with strong light such as laser light.
Having a larger field-effect mobility than amorphous semiconductors, crystalline semiconductors can operate at higher speed. Since crystalline silicon can provide not only an NMOS TFT but also a PMOS TFT in a similar manner, a CMOS circuit can be formed by using crystalline silicon. For example, among active matrix type liquid crystal display devices, there is known one having a monolithic structure (i.e., a monolithic active matrix circuit) in which peripheral circuits (drivers, etc.) are also constituted of CMOS crystalline TFTs.
FIG. 1
is a block diagram showing a monolithic active matrix that is used in a general liquid crystal display. A source driver (column driver) and a gate driver (row driver) are provided as peripheral driver circuits. A large number of pixel circuits each constituted of a switching transistor and a capacitor are formed in an active matrix circuit area (pixel area). The pixel transistors of the matrix circuit are connected to each of the peripheral driver circuits via source lines or gate lines having the same number of columns or rows. TFTs used in the peripheral circuits, particularly peripheral logic circuits such as a shift register, are required to operate at high speed. Therefore, those TFTs are required to allow passage of a large current with a small variation in a selected state (on-current).
On the other hand, to assure a long-term holding of charge in the capacitor, TFTs used in the pixel circuit are required to have a sufficiently small leak current (off-current) with a small variation in a non-selected state, i.e., while a reverse-bias voltage is applied to the gate electrode. Specifically, the off-current should be smaller than 1 pA, and the variation should be less than 10%. On the other hand, the on-current need not be so large.
Although the above characteristics are physically contradictory, it is required that TFTs having such characteristics be formed on the same substrate at the same time, which means that all the TFTs should have a large on-current and a small off-current both with a small variation. It is easily understood that it is technically very difficult to satisfy such requirements.
For example, it is known that crystallizing an amorphous silicon film by optical annealing such as laser annealing is effective for obtaining a TFT having a large on-current (i.e., a large field-effect mobility). However, it is empirically known that it is impossible to attain both of a large field-effect mobility and a small off-current variation at the same time.
Also known is a method of crystallizing an amorphous silicon film by thermal annealing. Although this method can reduce an off-current variation, it cannot provide a large field-effect mobility. The present invention is to solve such a difficult problem.
SUMMARY OF THE INVENTION
The present inventors have found that it becomes possible to proceed crystallization more easily and provide better crystallinity than in the conventional methods of using thermal annealing or optical annealing by bringing a very small amount of an element of Ni, Pt, Pd, Cu, Ag, Fe, or the like, or its compound substantially in close contact with the surface of an amorphous silicon film and then performing thermal annealing or optical annealing (laser annealing, rapid thermal annealing (RTA), or the like). For example, when the thermal annealing is employed, the crystallization time can be shortened and the crystallization temperature can be lowered from the conventional cases.
It has been confirmed that the above advantages are obtained because Ni, Pt, Pd, Cu, Ag, Fe, or the like serves as a catalyst element for accelerating crystallization of an amorphous silicon film. More specifically, the above catalyst elements form a crystalline silicide with amorphous silicon at a crystallization energy lower than that of amorphous silicon. Then, after the catalyst element in the silicide moves to the location of amorphous silicon ahead, silicon enters the site of the silicide which was occupied by the catalyst element, thus forming crystalline silicon. As the catalyst element moves through amorphous silicon, a crystallized region is formed.
Thus, it has been confirmed that the crystallization of an amorphous silicon film utilizing a catalyst element proceeds in two steps that respectively correspond to the following modes:
(1) The mode in which crystallization that occurs at a region where a catalyst element is introduced. Although it is not appropriate to strictly define the crystallization direction, it may be said that crystal growth proceeds perpendicularly to a substrate.
(2) The mode in which a crystal-grown region expands as catalyst element moves from the region where it was introduced to a region where it was not, so that crystal growth proceeds parallel with the substrate.
In particular, as for the crystal growth mode (2), growth of columnar crystals parallel to a substrate has been confirmed by observations using a TEM (transmission electron microscope). In the following description, the crystal growth mode (1) and a resulting crystallized region are called vertical growth and a vertical growth region, and the crystal growth mode (2) and a resulting crystallized region are called lateral growth and a lateral growth region.
For example, if a thin coating of a catalyst element, or its compound or the like is formed on an amorphous silicon film by a certain means so as to be substantially in close contact with the latter and then thermal annealing is performed, the coated portion is initially crystallized mainly by the vertical growth and thereafter a region surrounding that portion is crystallized by the horizonal growth.
The crystallinity can be improved by performing proper optical annealing after the above crystal growth by thermal annealing. The main effects of the optical annealing are to increase the field-effect mobility and reduce the threshold voltage.
The vertical growth and the lateral growth have a difference in the degree of crystal orientation. In general, the vertical growth does not
Booth Richard
Costellia Jeffrey L.
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
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