Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-07-13
2003-05-27
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S733000
Reexamination Certificate
active
06569761
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 89,123,652, filed Nov. 9, 2000, the full disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method for shrinking critical dimension (CD) in semiconductor processes, and more particularly to a method for shrinking critical dimension by performing an over-exposure process to a photosensitive layer using a patterned reticle.
2. Description of the Prior Art
Critical dimension (CD), which represents the smallest line width obtainable in a photolithography process, is one of the key factors in the semiconductor process. It is well known that as the sizes of semiconductor devices are continually being reduced, the critical dimension has also significantly shrunk. There are three major ways to shrink the critical dimension in the prior art techniques which include, lithography technique, photoresist reflow technique, and the polymer deposition technique. The shrinkage of the critical dimension is accomplished by directly reducing the critical dimension of the pattern of the reticle in the application of the photolithography technique, and other two techniques reduce the size of semiconductor devices by the shrinkage of the critical dimension of the pattern of the photoresist.
The photolithographic process utilizes the reduction in wavelength of the exposure light source to restrain the light diffraction, which results in the proximity effects; in other words, the resolution is improved by reducing the wavelength of the exposure light source. For example, a critical dimension of 0.3 &mgr;m requires an exposure light source with a wavelength about 365 nm (I-line), a critical dimension of 0.2 &mgr;m requires an exposure light source with a wavelength about 248 nm (deep UV), and a critical dimension of 0.18 &mgr;m requires an exposure light source with a wavelength about 193 nm. However, since the depth of focus is directly proportional to the wavelength of exposure light source, the reduction in wavelength results in differences in the photoresist topography and decreases the throughput in the lithography process when a thicker photoresist is applied. Moreover, It is very difficult, costly and time consuming to develop a light source with a shorter wavelength, and a development in redesigning a lithography system for the new light source is compulsory.
The photoresist reflow technique and the polymer deposition technique utilize a patterned reticle with a greater critical dimension to form a patterned photoresist with a smaller critical dimension. The disadvantage of implementing the photoresist reflow process is that the thermal treating process is very difficult to control, and the redistribution of the photoresist can not be ideally controlled nor stopped from flowing into the topographic profile. The drawback of the polymer deposition process is that the etching process later applied is greatly affected and a uniform polymer distribution is difficult to secure.
According to the above description, in the development of semiconductor device fabrication, the shrinkage of the critical dimension is an important task. It is desired to provide a method for not only shrinking the critical dimension but also preventing drawbacks in the prior art technique.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method for shrinking critical dimension of semiconductor devices is provided.
It is another object of this invention that a method for shrinking critical dimension by performing an over-exposure process to a photosensitive layer using a patterned reticle is provided.
It is a further object of this invention that a method for shrinking critical dimension by over-exposing a photosensitive layer resulting in the shrinkage of an unexposed region is provided.
It is yet another further object of this invention that a method for shrinking critical dimension associated with the present exposure technology is provided, for example, an I-line exposure light source is used for a critical dimension of 0.25 &mgr;m process, or a deep UV (ultraviolet) exposure light source is used for a critical dimension of 0.13 &mgr;m process.
In accordance with the present invention, a method for shrinking critical dimension is disclosed. The method comprises a step of forming a photosensitive layer on a substrate. Then, a patterned reticle with a pattern is provided and aligned with the substrate. Next, an over-exposure process is performed to the photosensitive layer to form a patterned photosensitive layer by using the provided patterned reticle. Then, a sacrificial layer is formed on the substrate and the patterned photosensitive layer. The sacrificial layer is anisotropically etched to expose the patterned photosensitive layer. Then, the patterned photosensitive layer is removed and the pattern is reverse-transferred to the sacrificial layer. Thus, due to the over-exposure process increases the exposed region and reduces the unexposed region, the line width of the reverse-transferred pattern (used as the unexposed region) in the sacrificial layer is reduced to accomplish the goal of shrinking the critical dimension.
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