Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-09-07
2003-09-09
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06618835
ABSTRACT:
BACKGROUND
1. Field of the Invention
This invention relates to digital circuits. In particular, the invention relates to design synthesis.
2. Description of Related Art
Tri-state devices are useful in digital circuits to protect a circuit element from logic contention. A tri-state device has basically two modes of operation: enable mode and disable mode. In the enable mode, the tri-state device generates a logic output, either LOW or HIGH, depending on the data input. In the disable mode, the tri-state device generates a high impedance state regardless of the data input.
A Hardware Description Language (HDL) such as Verilog or Very High Speed Integrated Circuits Hardware Description Language (VHDL) can model a tri-state device. For example, VHDL can model a tri-state device using high impedance value as a literal encoding under a condition. However, when the tri-state device is connected to a circuit that may propagate the high impedance value of the output of the tri-state device under some circuit conditions, the modeling or synthesis becomes difficult. When the circuit has a loop structure which has one or more feedback connections, the synthesis or modeling of such a circuit has not been adequately dealt with. Typically, a circuit may be modeled by a number of processes. Most existing synthesis tools implement each process independently. However, they implement the tri-state behavior correctly only to the boundary of the process. When the high impedance values are passed from one process to another, the high impedance state is lost.
Therefore, there is a need to have an efficient technique to synthesize a circuit having a loop structure and a tri-state device.
REFERENCES:
patent: 6154056 (2000-11-01), Casper
patent: 6211713 (2001-04-01), Uhlmann
patent: 6334208 (2001-12-01), Erickson
patent: 6345012 (2002-02-01), Casper
patent: 6374380 (2002-04-01), Sim
patent: 6449751 (2002-09-01), Hussain et al.
patent: 6470485 (2002-10-01), Cote et al.
Garlapati Krishna
McElvain Kenneth S.
Blakely , Sokoloff, Taylor & Zafman LLP
Siek Vuthe
Synplicity, Inc.
Tat Binh
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