Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-09-07
2003-09-30
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S107000, C438S127000, C438S118000
Reexamination Certificate
active
06627477
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to the manufacture of semiconductor packaging, and more particularly, to incorporating multiple functions onto a single semiconductor device.
2. Related Art
As the semiconductor industry continues to scale down semiconductor devices, it is becoming desirable to incorporate multiple functions into each device, thereby forming a “system-on-a-chip.” However, the level of integration required to manufacture such a device is difficult due to the various requirements, as well as the differences in the size and shape of each component that makes up the integrated device. Accordingly, there exists a need in the industry for a method of manufacturing an integrated semiconductor device that solves the problems associated with “system-on-a-chip” fabrication.
SUMMARY OF THE INVENTION
The first general aspect of the present invention provides a method of assembling a plurality of semiconductor devices such that active surfaces of the devices are co-planar, comprising: providing a first substrate having a substantially planar surface; temporarily mounting the active surfaces of the plurality of devices on the substantially planar surface of the first substrate; attaching a second substrate, having a conformable bonding material thereon, to exposed surfaces of the plurality of devices; and removing the first substrate.
The second general aspect of the present invention provides a method of forming a semiconductor device, comprising: providing a first substrate having a substantially planar surface; temporarily mounting a first surface of a plurality of semiconductor devices to the planar surface of the first substrate; providing a second substrate having a conformable bonding material on an attachment surface of the second substrate; joining the first and second substrates, such that the bonding material adheres to a second surface of the semiconductor devices, and wherein the bonding material deforms to accommodate differences in size of the devices; and removing the first substrate from the first surface of the semiconductor devices, such that the devices maintain a substantially co-planar first surface.
The third general aspect of the present invention provides a semiconductor device, comprising: a substrate having a conformable bonding material on a surface of the substrate; and a plurality of chips, having different sizes, affixed to the bonding material of the substrate, wherein exposed active surfaces of the chips are co-planar.
The fourth general aspect of the present invention provides a semiconductor package, comprising a substrate having at least two chips mounted thereon, wherein the at least two chips perform different functions within the semiconductor package, and wherein an active surface of the at least two chips are planar and extend away from the substrate.
The foregoing and other features of the invention will be apparent from the following more particular description of the embodiments of the present invention.
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Hakey Mark C.
Holmes Steven J.
Horak David V.
Linde Harold G.
Sprogis Edmund J.
Chadurjian Mark F.
Roman Angel
Schmeiser Olsen & Watts
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