Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-03-08
2003-09-02
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S250000, C438S253000, C438S393000, C438S396000, C438S656000, C438S685000, C438S687000
Reexamination Certificate
active
06613669
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same and, more particularly, to an extremely thin barrier metal structure and a method for manufacturing the same.
2. Description of the Related Art
The fine patterning and the integration density of semiconductor device structures are still energetically being improved. As for the fine patterning, presently, a design rule of 0.10 &mgr;m for semiconductor elements is discussed in various ways, so that DRAMs, ultra-high speed logic ICs, and their hybrid ULSI semiconductor devices based on this design rule are being studied and developed.
To improve the integration density, operation speed, and multifarious-functioning and also to reduce the power dissipation of such semiconductor devices, it is very important to form an extremely thin barrier metal.
For example, with increasing integration densities of ULSIs, copper (Cu) or Cu alloys are more effectively used as a conductive layer of a trench wiring line (also called damascene wiring line). In this case, however, it is indispensable to provide a barrier metal for preventing this Cu material from being diffused. Moreover, with improving fine patterning of the wiring line, it is required to make the barrier metal film extremely thin, i.e. 5 nm or less.
In an opening (connection via hole or contact hole) for interconnection of wiring line layers in a multi-layer wiring line structure, the barrier metal film having a extremely thin thickness is indispensable as this opening is also more and more fine patterned.
Further, also in the case of DRAM memory cells each including one transistor and one capacitor, an extremely thin barrier metal is indispensable in formation of this capacitor.
The following will describe in detail the case of the DRAM memory cell with reference to the drawings.
FIG. 1A
to
FIG. 1C
are schematic cross-sectional views of sequential steps for manufacturing a pair of the above-mentioned memory cells in its memory-cell array.
As shown in
FIG. 1A
, an element-isolating insulator film
102
is formed in a predetermined region on the surface of a P conductivity-type silicon substrate
101
. This element-isolating insulator film
102
is formed by a well-known trench-element-isolating method. In an element's active region surrounded by this element-separating insulator film
102
are formed a pair of insulated gate field effect transistors (MOSFETs) constituting the above-mentioned transistor, the gate electrodes of which provide word lines
103
and
103
a.
Further, to the word lines
103
and
103
a
is introduced an N-type impurity in a self-alignment manner, to thereby form a bit-line-diffused layer
104
as well as diffused layers
105
and
105
a
for connecting capacitors. The bit-line-diffused layer
104
is connected via a contact plug
106
to a bit line
107
. Also, the diffused layers
105
and
105
a
are connected via connection holes formed in a first inter-layer insulator film
108
respectively to lower electrodes
109
and
109
a
of the capacitor. Those lower electrodes
109
and
109
a
are formed by patterning a polycrystalline silicon (poly-silicon) film containing a phosphorus impurity.
Next, as shown in
FIG. 1B
, a dielectric insulator film
110
is formed on the lower electrodes
109
and
109
a
as adhered thereon. As this dielectric insulator film, a highly dielectric material with a relatively high dielectric constant is used. This highly dielectric insulator film may be made of, for example, a tantalum oxide film (Ta
2
O
5
film), strontium titanate film (STO film), barium-strontium titanate film (BST film), or lead zirconate titanate film (PZT film).
Next, as shown in
FIG. 1C
, a titanium nitride film
111
and a tungsten silicide film
112
are formed by sputtering. Then, they are patterned by well-known photo-resist and dry etching technologies to form a cell plate. Thus, a pair of capacitors is formed which comprises the lower electrodes
109
and
109
a
, the dielectric insulator film
110
, and the above-mentioned cell plate.
Then, a second inter-layer insulator film
113
including a silicon oxide film is formed so as to cover the whole surface.
In the case of a trench wiring line made of Cu or a Cu alloy, the Cu material thereof must be coated with a barrier metal film to prevent its diffusing. If, for example, a prior art technology using a titanium nitride film as the barrier metal is employed, however, its film thickness must be 20 nm or more. Such a film thickness order of the barrier metal may increase the resistance of the wiring line to thus deteriorate the performance of the semiconductor device as the wiring line is decreased in width. This is because such a barrier metal has a higher specific resistance than Cu. This problem holds true also with the formation of a barrier metal in the above-mentioned opening.
Also, a silicon nitride film may be used as the above-mentioned diffusion preventing film and is effective as a barrier for the trench wiring line. When it is connected to another wiring line or electrode, however, the silicon nitride film cannot be applied as is because it is an insulator film; thus requiring complicated process steps.
On the other hand, a highly dielectric material used as the dielectric insulator film of the capacitor shown in
FIG. 1
has generally a low heat-resistant, and oxygen contained in this highly dielectric film is diffused at a temperature of about 800° C., thus very easily reducing the capacitance of the capacitor and deteriorating its insulation.
Therefore, a barrier metal film needs to be interposed between the lower electrode and the dielectric insulator film indispensably. If, however, a titanium nitride film is used as the barrier metal as in a prior art, it is necessary to have a large film thickness, so that the spacing between the lower electrodes
109
and
109
a
mentioned with the prior art cannot be reduced. In consequence, the area of a memory cell is increased by that much so that a highly dielectric material such as mentioned above cannot effectively be applied on the dielectric insulator film of the capacitor.
SUMMARY OF THE INVENTION
Accordingly, one object of the invention is to provide an extremely thin barrier metal that can prevent oxygen from being diffused from a highly dielectric material employed.
Another object of the invention is to provide an extremely thin barrier metal that can be used on a trench wiring line or a connection opening through which wiring line layers are interconnected.
Yet another other object of the invention is to shorten the required manufacturing process steps and reduce the costs for manufacturing the semiconductor device.
According to one feature of the present invention, there is provided on a semiconductor device in which an insulating layer formed on the surface of a conductor film of a semiconductor substrate is reformed into a conductive barrier layer.
According to another feature of the present invention, there is provided a semiconductor device in which part or the whole of an insulating layer formed on a surface of an insulator film on the semiconductor substrate is reformed into a conductive barrier layer.
In the above mentioned semiconductor devices, the insulating layer is preferably a silicon nitride film and the conductive barrier layer is preferably a metal compound of high melting-point metal, silicon (Si) and nitrogen (N). The high melting-point metal is a metal selected from a group consisting of titanium (Ti), tantalum (Ta), Nickel (Ni), molybdenum (Mo) and tungsten (W).
Alternatively, the insulating layer is preferably a silicon nitride film, and the conductive barrier layer is preferably made of Ti—Si—N with a ratio of 25-35 atomic percent of Ti, 30-40 atomic percent of Si, and 30-40 atomic percent of N.
Further, the conductor film may be a lower electrode of a capacitor. In this case, a dielectric film of the capacitor is adhered on the upper surface of the conductive barrier layer, and an upper electrode,
Katten Muchin Zavis & Rosenman
NEC Electronics Corporation
Smith Matthew
Yevsikov V.
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