Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2002-05-31
2003-09-23
Clark, Jasmine (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S778000, C257S783000, C257S730000
Reexamination Certificate
active
06624512
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
A related patent application is a commonly assigned Japanese Patent Application No. 2001-384255 filed on Dec. 18, 2001, which is incorporated by reference into the present patent application.
BACKGROUND OF THE INVENTION
1) Technical Field of the Invention
The present invention relates to a semiconductor integrated circuit device and a printed wired board for mounting the device.
2) Description of Related Arts
Recently developed hand-held electronic devices including cellular phones and mobile computers have been improved in various functions and have been reduced in their sizes. Still demands for improvement of capacity, speed, and functions of the semiconductor integrated circuit devices (referred to simply as an “IC device”), as well as demand for reduction of the package of the IC device have increased. In particular, to address the demand for reduction of the size of the package, flip-chip mounting (bonding) is commonly used, in which IC devices with a so-called BGA (Ball Grid Array) structure are flipped to oppose a printed wired board mounted thereon.
Referring to
FIGS. 21A
,
21
B,
22
A, and
22
B, a conventional IC device and a printed wired board will be described. The IC device
210
is an MMIC chip (Microwave Monolithic Integrated Circuit) made of material such as silicon (Si) and gallium arsenide (GaAs), which has a downward faced surface
211
and an upward faced surface
212
. Also, a plurality of bumps
213
of material such as solder are located on the chip surface
211
. The printed wired board
220
has a substrate
221
made of a material such as glass-epoxy resin, and a plurality of substrate electrodes
224
formed by gold plating on the board surface
222
.
As illustrated in
FIGS. 21A and 22A
, the IC device
210
so constructed is flipped and disposed over the printed wired board
220
so that the chip surface
211
opposes the board surface
222
. In order to achieve a good electrical connection between each solder bump
213
and the corresponding substrate electrode
224
, the IC device
210
must be disposed over the printed wired board
220
in a extremely strict and precise manner i.e., with an alignment accuracy much smaller than the diameter of the solder bump
213
. The IC device
210
are precisely aligned to the printed wired board
220
, and then heated for mounting (flip-chip bonding), as illustrated in
FIGS. 21B and 22B
.
According to the prior art shown in
FIG. 21A
, an alignment control system uses two sensitive cameras
230
for independently reading image data of the IC device
210
and the printed wired board
220
, respectively, and controls relative translation therebetween based upon the image data so as to align them with each other. Thus, the conventional alignment control system of the flip-chip bonding process requires two sensitive cameras
230
for the alignment of the IC device
210
and the printed wired board
220
with much less precision than the diameter of the solder bump
213
.
However, such an alignment control system with the use of two sensitive cameras
230
, which is an expensive and complicated system, raises the cost of the flip-chip bonding process and requires a substantial time to control relative translation between the IC device
210
and the printed wired board
220
. Consequently, the manufacturing cost of the resultant device is rather high.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor integrated circuit device and a printed wired board, which can self-align to each other in an exact and precise manner, even where the semiconductor integrated circuit device and the printed wired board are positioned to each other with the alignment accuracy as the diameter of the solder bump.
The printed wired board according to the first aspect of the present invention, which mounts a semiconductor integrated circuit device having a plurality of conductive bumps thereon. The printed wired board includes a plurality of conductive recessed members at positions corresponding to those of the conductive bumps. Each of the conductive bumps is fit into the corresponding conductive recessed member so that the printed wired board is aligned to the semiconductor integrated circuit device. Therefore, each of the conductive recessed members self-aligns the corresponding conductive bump so as to eliminate the necessity of the precise alignment. In other words, even where the semiconductor integrated circuit device is arranged on the printed wired board without a severe accuracy, each conductive bump can be guided in a stable and proper position on the corresponding conductive recessed member.
The semiconductor integrated circuit device according to the second aspect of the present invention, which is mounted on a printed wired board having a plurality of conductive bumps thereon. The semiconductor integrated circuit device includes a plurality of conductive recessed members at positions corresponding to those of the conductive bumps. Each of the conductive bumps is fit into the corresponding conductive recessed member so that the semiconductor integrated circuit device is aligned to the printed wired board. Therefore, each of the conductive recessed members self-aligns the corresponding conductive bump so as to eliminate the necessity of the precise alignment. In other words, even where the semiconductor integrated circuit device is arranged on the printed wired board without severe accuracy, each conductive bump can be guided in a stable and proper position on the corresponding conductive recessed member.
The semiconductor integrated circuit device according to the present invention, further includes a circuit surface opposing to the printed wired board and a circuit flip-surface and a wire pattern formed on the circuit flip-surface. The wire pattern electrically contacts one of the conductive bumps. Therefore, the biasing wire pattern with large current capacity can be obtained without enlarging the package of the semiconductor integrated circuit device.
The printed wired board according to the third aspect of the present invention, which mounts a semiconductor integrated circuit device of a predetermined planar configuration having a plurality of conductive bumps thereon. The printed wired board includes a bottom surface and a peripheral wall surface together defining a receiving depression having the predetermined planar configuration which is substantially identical to that of the semiconductor integrated circuit device. The printed wired board also includes a plurality of substrate electrodes formed on the bottom surface. The semiconductor integrated circuit device is received into the receiving depression so that each of the conductive bumps is aligned to the corresponding substrate electrode. Thus, when the semiconductor integrated circuit device is flip-chip mounted on the printed wired board, the peripheral wall surface can be used as an alignment restraint to guide the semiconductor integrated circuit device along the peripheral wall surface into the receiving depression. Therefore, the semiconductor integrated circuit device is aligned with the printed wired board in a precise manner.
In the printed wired board according to the present invention, the peripheral wall surface of the receiving depression is inclined outwardly. This facilitates the semiconductor integrated circuit device to be inserted into the receiving depression.
The printed wired board according to the fourth aspect of the present invention, which have a plurality of conductive bumps thereon. The printed wired board includes a plurality of substrate electrodes and a plurality of bosses made of hard metal. Each boss has a side surface. The side surfaces of the plurality of bosses contact a peripheral portion of the semiconductor integrated circuit device so that each of the conductive bumps is aligned to the corresponding substrate electrode. Thus, the bosses made of hard metal can be used as alignment restraints to align each of the conductive bumps to the correspo
Clark Jasmine
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Semiconductor integrated circuit device and printed wired... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit device and printed wired..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit device and printed wired... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3005442