Method of forming a self-aligning pad

Details Method of forming a self-aligning pad Method of forming a self-aligning pad

2002-06-04

2003-09-16

Ho, Hoai (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

Reexamination Certificate

active

06620721

ABSTRACT:

BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a method of forming a bonding pad, and more particularly, to a method of forming a self-aligning bonding pad with an alloy process and a photo-etching process (PEP).
2. Description of the Prior Art
In an integrated circuit, each transistor or cell needs to be electrically connected to corresponding metal lines within different metal layers after being formed. Then the transistors are electrically connected to bonding pads through each metal line. After being packaged, the integrated circuit is electrically connected to an external circuit through terminals, which are electrically connected to the bonding pads.
Aluminum alloys with silicon dioxide (SiO
2
) dielectrics have been the materials of choice for interconnective systems since the dawn of the integrated circuit (IC) era. These materials were convenient to process using mature subtractive etching processes for metal line patterning. However, as ICs have relentlessly marched down the path towards smaller geometry into a deep sub-micron generation in the pursuit of increased speed, the traditional Al/SiO
2
interconnective system has shown itself to be a limiting factor. Copper dual-damascene architectures with low-k dielectrics are thus developing and becoming the norm in forming interconnections. Overall, RC delays occurring during signal transmission are reduced and the operating performance is improved because copper has 40% less resistivity than aluminum, and low-k materials reduce the capacitance between interconnections.
However the integrated circuit design cannot produce a marked effect by merely focusing on the materials of the interconnective system. The bonding pad process, prior to the wafer acceptance test (WAT) and the packaging process, has a critical importance. In a bonding process, not only the material selected has an eminent effect on the final product, but the processing steps are also very important. The selection of material affects the physical characteristics of a device directly. The processing include steps such as alloy processing, a cleaning process, and a development process. Thus, parameters in a heat treatment process need be tuned and an acid solution and a developer need be utilized. The quality of the bonding pad is apt to be degraded due to inadequate processing.
In U.S. Pat. No. 6,228,753, Lo et al. proposed a basic method of fabricating a bonding pad. Please refer to FIG.
1
through FIG.
4
. FIG.
1
through
FIG. 4
are schematic diagrams showing the formation of a bonding pad
16
on a semiconductor wafer according to a prior art method. As shown in
FIG. 1
, the prior art method is to form at least one conductor
12
on a silicon substrate
11
of the semiconductor wafer
10
. The conductor
12
may be a conductive plug, a metal line, a metal interconnection, or a dual-damascence structure.
In
FIG. 1
, a contact plug is used as an example. Each conductor
12
is disposed in a dielectric layer
14
to be electrically isolated. The material composition of the conductor
12
comprises tungsten (W), copper (Cu), aluminum (Al), an aluminum-copper alloy, or other conductive material. One bonding pad
16
is formed on top of each conductor
12
. The bonding pad
16
is substantially composed of copper. A passivation layer
18
is then formed on the semiconductor wafer
10
. The material composition of the passivation layer
18
comprises borophosphosilicate glass (BPSG) or silicon nitride. The passivation layer
18
exposes portions of the bonding pad
16
.
As shown in
FIG. 2
, a sacrificial layer
22
is formed on the passivation layer
18
and the bonding pad
16
. The sacrificial layer
22
is a positive photo-resistant layer having a thickness of 3000~5000 Å. A photolithography process comprising exposure, development, and etching steps is then performed to form an opening
23
in the sacrificial layer
22
, exposing the top surface of the bonding pad
16
. It is worth noticing that a hard-bake process is not performed after the etching step of the photolithography process. Therefore the adhesion ability between the sacrificial layer
22
and the passivation layer
18
is not strong at all.
As shown in
FIG. 3
, an alloy layer
24
is formed on the semiconductor wafer
10
. The alloy layer
24
covers the sacrificial layer
22
and the exposed bonding pad
16
. The alloy layer
24
, composed of an aluminum-copper alloy and having a thickness of 3000~6000 Å, is formed by evaporation or E-beam evaporation (EBE).
As shown in
FIG. 4
, a supersonic cleaning process is performed with a supersonic cleaner. The semiconductor wafer
10
is positioned in the supersonic cleaner, in which de-ionized water is provided, to remove the sacrificial layer
22
and portions of the alloy layer
24
by supersonic vibrations, without removing the alloy layer
24
on top of the bonding pad
16
. Since the sacrificial layer
22
, being a positive photo-resistant layer, is not hard-baked, it is loosely adhered to the passivation layer
18
. Accordingly, the alloy layer
24
on the sacrificial layer
22
can be simultaneously removed when removing the sacrificial layer
22
with the supersonic vibrations. On the other hand, there is no sacrificial layer
22
, with poor adhesion ability, existing between the bonding pad
16
and the alloy layer
24
on the bonding pad
16
. Thus, the alloy layer
24
on the bonding pad
16
is not removed when the supersonic vibration cleaning is carried out.
The prior art method of forming the bonding pad is to form an aluminum-copper alloy layer by an alloy process, to improve the bonding ability of the bonding pad
16
due to the many alloy phases of an aluminum-copper alloy and other metals. In addition, the number of cleaning and development processes are reduced. The sacrificial layer
22
and the unwanted alloy layer
24
are removed by utilizing de-ionized water and ultrasonic vibrations to avoid acidic erosion of the portion of the alloy layer
24
on top of the bonding pad
16
. However, an edge portion
26
of the bonding pad
16
, formed according to the prior art method, always produces an out diffusion phenomenon of copper atoms because the copper material is in contact with the passivation layer
18
directly. As a result, short circuits occur.
SUMMARY OF INVENTION
It is therefore a primary objective of the claimed invention to provide a method of forming a bonding pad, specifically a method utilizing an alloy process and a photo-etching process (PEP) to form a self-aligning bonding pad to resolve the abovementioned problem.
According to the claimed invention, a substrate, including a first dielectric layer and at least one first conductive layer in the first dielectric layer, is provided. Then a second conductive layer is formed on the first conductive layer and the first dielectric layer. Thereafter, a thermal treatment process is performed to form a third conductive layer in the second conductive layer in contact with the first conductive layer, and completely oxidize the remaining second conductive layer to form a second dielectric layer. Next, a third dielectric layer is formed on the second dielectric layer. Finally, a photo-etching process (PEP) is performed to remove portions of the third dielectric layer and portions of the second dielectric layer on the first conductive layer until reaching the top surface of the third conductive layer.
It is an advantage of the claimed invention that the method of forming the bonding pad according to the present invention is to sputter an aluminum layer on the bonding pad and on the dielectric layer surrounding the bonding pad, followed by a heat treatment process. The aluminum layer on top of the bonding pad reacts and becomes a stacked structure, including an aluminum-oxide layer and an aluminum-copper alloy layer. The aluminum layer on top of the dielectric layer surrounding the bonding pad is completely oxidized and becomes an aluminum-oxide layer to be used for self-aligning in a subsequent etching process.
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