Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-12-15
2002-10-29
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S655000, C438S656000, C438S658000, C438S664000, C438S682000
Reexamination Certificate
active
06472311
ABSTRACT:
TECHNICAL FIELD
This invention relates to a process for manufacturing a semiconductor device where a refractory metal silicide is formed on the surface of a diffusion layer. In particular, it relates to a process for manufacturing a semiconductor device where diffusion layers with and without a refractory metal silicide on their surfaces are formed on the same substrate.
BACKGROUND ART
Generally, shrinking a semiconductor integrated circuit causes increase in a resistance in a diffusion layer. To avoid the problem, it is known that a refractory metal silicide is formed on the surface of the diffusion layer to reduce a resistance in the diffusion layer (hereinafter, a diffusion layer on which a refractory metal silicide layer is formed is referred to as a silicide diffusion layer.).
On the other hand, it is known in a semiconductor device where an MOS device is integrated that a protective resistance consisting of a high-resistivity diffusion layer is provided for protecting a semiconductor device from electrostatic discharge damage due to external static electricity.
Thus, there has been a need for a technique for forming a low-resistivity silicide diffusion layer and a high-resistivity diffusion layer without a refractory metal silicide layer on its surface (hereinafter, referred to as a “non-silicide diffusion layer”) on the same semiconductor substrate, and various proposals have been made.
For example, Japanese Patent Application Laid-Open No. 61-43464 has disclosed a process for forming an oxide film for preventing silicidation in a region not to be silicided.
The manufacturing process comprises the steps illustrated in
FIGS. 3 and 4
.
First, on a silicon substrate
1
is formed an LOCOS region
2
for separating devices and after forming a gate, is formed a protective oxide film
3
with a thickness of 150 Å for source-drain type of ion implantation. Then, As
+
or BF
2
+
ions are implanted as a dopant and the product is annealed to form a high-concentration dopant diffusion layer
4
,
5
as a source-drain (FIG.
3
(
a
)).
After removing the protective oxide film
3
, a thick oxide film
3
a
for forming a non-silicide diffusion layer is formed by CVD technique (FIG.
3
(
b
)).
A photoresist
7
is formed on a region corresponding to the diffusion layer
4
which is not to be silicided (FIG.
3
(
c
)), the oxide film
3
a
is etched using the photoresist
7
as a mask, and the photoresist
7
is removed to form an oxide film
8
for preventing silicidation (FIG.
3
(
d
)).
The silicon substrate
1
is washed before forming a metal film, titanium Ti is deposited by, for example, sputtering to form a Ti film
9
(FIG.
4
(
a
)) and the product is subject to annealing/siliciding to form a silicide diffusion layer
10
on the diffusion layer
5
(FIG.
4
(
b
)). Then, the unreacted Ti film
9
is removed by selective etching and is subject to resist-reducing annealing (FIG.
4
(
c
)). After these steps, the silicide diffusion layer
10
is formed only on the surface of the diffusion layer
5
.
Japanese Patent Application Laid-Open No. 4-37163 has disclosed that a polycrystalline silicon layer similar to a gate electrode in an MOS transistor is formed in a non-silicide region to prevent a diffusion layer from being silicided.
In the above process for forming a silicide and a non-silicide diffusion layers, a protective oxide film for ion implantation is removed, an oxide film or a polycrystalline silicon layer is formed for forming a silicide diffusion layer and the product is etched to form an oxide film for preventing silicidation. It is because the protective oxide film for ion implantation is originally thin for promoting ion permeation and further the protective oxide film damaged by ion implantation has poor film quality due to, for example, many defects so that its blocking performance to Ti deposition by sputtering in a subsequent step is inappropriately deteriorated.
Thus, when an oxide film for preventing silicidation is separately formed for forming a silicide and a non-silicide diffusion layers, the number of steps increases.
Japanese Patent Application Laid-Open No. 9-64349 has disclosed that a dopant concentration during ion implantation is varied without separately forming such an oxide film for preventing silicidation, to reduce the steps. According to this manufacturing process, increase in a dopant concentration causes forming a knock-on layer on the surface of a diffusion layer and thus silicidation reaction is inhibited, resulting in formation of a high-resistivity refractory metal silicide.
In the above technique, it is, however, difficult to control a resistance and the inside of a wafer is inadequately homogeneous.
An object of this invention for solving the problems in the prior art is to provide a process for manufacturing a semiconductor device, which can shorten the process for manufacturing a semiconductor device comprising a silicide and a non-silicide diffusion layers and can form an adequately homogeneous and stable non-silicide diffusion layer (high-resistivity diffusion layer).
DISCLOSURE OF THE INVENTION
In order to achieve the objective, this invention provides a process for manufacturing a semiconductor device comprising the steps of implanting ions into a silicon substrate, heating the substrate for activating the ions to form a diffusion layer and then forming a silicide and a non-silicide diffusion layers, characterized in that in the step of heating the substrate for activating the ions, oxygen is fed to form an oxide film for preventing silicidation.
The oxide film has a thickness of at least 100 Å.
Furthermore, in the heating step, rapid thermal oxidation is conducted.
Specifically, in the process for manufacturing a semiconductor device, after implanting ions into the silicon substrate, oxygen is fed during heating for activating the implanted ions, whereby the ions are activated while an oxide film for subsequently preventing silicidation is formed.
A step for separately forming an oxide film for preventing silicidation can be, therefore, eliminated, leading to a shortened manufacturing process.
Since an oxide film is formed with a thickness of at least 100 Å, it is possible to provide an oxide film for preventing silicidation which ensures adequate reliability.
The oxide film for preventing silicidation is formed by rapid thermal oxidation. Specifically, heating is conducted, for example, at about 950° C. to about 1150° C. both inclusive for about 1 min to about 10 min both inclusive to form an oxide film for a short time, so that dopant diffusion due to thermal diffusion can be prevented and shallow junction can be formed.
Furthermore, this invention provides a process for manufacturing a semiconductor device comprising the steps of
forming an insulating region for separating devices on a silicon substrate;
implanting ions to an activated region made of a silicon layer between the insulating regions for separating devices for forming a diffusion layer;
activating the ions while heating the activated region to form an oxide film for preventing silicidation on the region;
removing the oxide film for preventing silicidation on a region to be silicided;
forming a refractory metal layer and then annealing the product to silicide a silicon layer in the region to be silicided; and
removing an unreacted refractory metal layer, wherein a silicide and a non-silicide diffusion layers are formed on the same substrate.
The oxide film for preventing silicidation has a thickness of at least 100 Å.
In the heating step for activating the ions while forming the oxide film for preventing silicidation, oxygen is fed during heating for conducting rapid thermal oxidation.
The rapid thermal oxidation is conducted at 950° C. to 1150° C. both inclusive for 1 min to 10 min both inclusive.
Specifically, this process for manufacturing a semiconductor device comprises the steps of
forming an insulating region for separating devices on a silicon substrate;
implanting ions to an activated region made of a silicon layer betwe
Asahi Kasei Microsystems Co. Ltd.
Berry Renee R.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
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