Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-12-29
2002-10-22
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S625000, C438S636000, C438S950000
Reexamination Certificate
active
06468896
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the field of semiconductor technology and relates to a semiconductor component and to a method for fabricating it.
As the integration level continues to increase in conjunction with the accompanying reduction in feature size in semiconductor components, stringent demands are imposed on the structurally faithful fabrication of the semiconductor components. The layers to be patterned are composed of metal or doped polysilicon, for example.
A method for patterning a metal layer is disclosed in U.S. Pat. No. 5,700,737, for example. In the method described therein, an antireflection layer composed of titanium nitride, an etching stop layer composed of silicon nitride and a photoresist layer are successively deposited on a metal layer. This is followed by photolithographic patterning of the photoresist layer, which, for its part, subsequently serves as a mask for patterning the etching stop layer. In a further method step, the antireflection layer is patterned in accordance with the masking by the etching stop layer. Finally, the metal layer is patterned in an etching process. The etching stop layer together with the antireflection layer serves as a hard mask. This fabrication method is very complicated due to the use of a plurality of layers.
A further method for fabricating semiconductor components is described in U.S. Pat. No. 5,707,883. In the method therein, an antireflection layer composed of silicon nitride and a photoresist layer are used to mask a metal layer. After it has been patterned, the antireflection layer simultaneously serves as a hard mask during the etching of the metal layer. In this fabrication method, it is necessary to remove the electrically insulating antireflection layer, in particular when subsequently making contact with the metal layer.
N. Yokoyama et al., 1992 Symposium on VLSI Technology Digest of Technical Papers, New York, IEEE 1992, pp. 68-69 has disclosed, for example, the use of polysilicon as a mask for SiO
2
patterning in conjunction with subsequent metallization, the polysilicon mask being partially attacked during the SiO
2
patterning and subsequently having to be removed in order to avoid undesirable electrical connections.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor component and a method for fabricating a semiconductor component which overcomes the above-mentioned disadvantageous of the prior art components and methods of this general type, and which enables electrically conductive layers to be patterned in a simple manner.
With the foregoing and other objects in view there is provided, in accordance with the invention a method for fabricating a semiconductor component having an electrically conductive layer configured on a semiconductor substrate. The method includes applying a silicon mask layer to a conductive layer; applying an etching mask to the conductive layer for patterning the silicon mask layer; selectively etching the silicon mask layer using the etching mask; and patterning the conductive layer in an etching process using the selectively etched mask layer as a hard mask.
A silicon layer is used as a hard mask in an etching process for patterning the conductive layer. The silicon layer itself is masked beforehand by a photolithographically patternable layer, preferably by a photoresist, and etched. In a multiplicity of etching processes, silicon has high selectivity with respect to metals and other conductive materials, selectivity being understood to mean the ratio of the etching rate of the material to be etched to the etching rate of silicon. By virtue of this high selectivity, silicon is hardly attacked by the etching process and can thus advantageously be used as a hard mask. Furthermore, silicon is distinguished by the fact that it is more thermostable than other hard mask materials, for example titanium nitride. As a result, heat-treatment processes that may be necessary during the further fabrication of the semiconductor component can be carried out even at high temperatures without destroying the silicon layer. By virtue of the good adhesion of silicon on a multiplicity of materials, reliable adhesion of the silicon layer on the conductive layer is ensured throughout the process for patterning the conductive layer, and this contributes to structurally faithful etching of the layer.
In accordance with an added feature of the invention, the silicon layer remains on the conductive layer after the latter has been patterned, and is used as an adhesion promoting layer between the conductive layer and a further layer that is deposited.
The good adhesion properties of silicon can also advantageously be utilized for the purpose of promoting adhesion between layers made of different materials. This is advantageous particularly when the further deposited layer has poor adhesion properties with regard to the conductive layer. The silicon layer makes it possible to improve, in particular, the adhesion properties between two metal layers made of different metals and also between a metal layer and an oxide layer.
In accordance with an additional feature of the invention, the silicon layer is adapted in terms of its layer thickness for the purpose of reducing reflections during the photolithographic patterning of its etching mask.
Given an appropriate configuration of the silicon layer, the latter can also be used as an antireflection layer. In this case, the thickness of the silicon layer is set in accordance with the light wavelength used during the photolithography, so that the reflection of the light at the surface of the conductive layer is reduced through interference in the silicon layer. The suppression—obtained by means of the silicon layer—of disturbing reflections during the photolithographic patterning of its etching mask improves the structurally faithful formation of the silicon layer with respect to the hard mask and, as a result, the structurally faithful formation of the conductive layer.
In accordance with an another feature of the invention, the silicon layer serves as an etching stop for protecting the conductive layer.
When contact holes are created in an insulation layer for the purpose of making contact with the conductive layer, the silicon layer can also advantageously be used as an etching stop. In this case, when the insulation layer is being etched through, the silicon layer prevents the conductive layer configured under the insulation layer from being etched or even completely removed, and thereby protects the conductive layer against destruction.
In accordance with a further feature of the invention, during the etching of the contact holes, the material of which the conductive layer is composed is not uncovered in regions outside the contact holes. This avoids possible contamination of other layers or of the semiconductor base substrate and of process equipment (e.g. deposition installations) by the material (e.g. Pt, Al, Cu).
In accordance with a further added feature of the invention, the silicon layer is amorphous or polycrystalline.
The silicon layer can be deposited onto the conductive layer using various methods which are adapted to the materials used in each case for fabricating the conductive layer. If silicon is applied by a sputtering method, then an amorphous silicon layer is produced. In contrast to this, a polycrystalline silicon layer is formed in the case of silicon deposition by means of a CVD method (Chemical Vapor Deposition) or after a heat treatment—following the sputtering process—of the amorphous silicon layer. The hard mask properties of the silicon layer can advantageously be adapted to the respective etching processes by the choice of an amorphous or polycrystalline structure.
In accordance with a further additional feature of the invention, the silicon layer is doped.
In order to increase the electrical conductivity, particularly when making contact with the conductive layer, the silicon layer can be doped beforehand in a suitable manner. Possible paras
Dehm Christine
Mazure-Espejo Carlos
Röhr Thomas
Ghyka Alexander
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
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