Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-04-22
2002-11-05
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C106S157900, C106S157900, C106S614000, C257S737000
Reexamination Certificate
active
06475896
ABSTRACT:
TECHNICAL FIELD
The invention relates to an electronic component and a semiconductor device, a method of making the same and method of mounting the same, a circuit board, and an electronic instrument, and in particular relates to a compact electronic component and a semiconductor device having a package size close to the chip size, a method of making the same and method of mounting the same, a circuit board, and an electronic instrument.
BACKGROUND ART
To pursue high-density mounting in semiconductor devices, bare chip mounting is the ideal. However, for bare chips, quality control and handling are difficult. In answer to this, CSP (chip scale package), or packages whose size is close to that of the chip, have been developed.
Of the forms of CSP semiconductor device developed, one form has a flexible substrate provided, patterned on the active surface of the semiconductor chip, and on this flexible substrate are formed a plurality of external electrodes. It is also known to inject a resin between the active surface of the semiconductor chip and the flexible substrate, in order to absorb the thermal stress. In Japanese Patent Application Laid-Open No. 7-297236, as the flexible substrate is described the use of a film carrier tape.
In these methods of fabricating a semiconductor device, a semiconductor chip is cut from a wafer, and individual semiconductor chips are mounted on a flexible substrate. As a result, not only is the patterned flexible substrate necessary, but also a process is required to mount each individual semiconductor chip on the flexible substrate, and therefore the devices used in each of the steps of the process must be special-purpose equipments, and the cost is increased.
Besides, a semiconductor device to which a CSP type package is applied is surface-mounted, and has a plurality of bumps for mounting on a circuit board. The surface on which these bumps are formed is preferably protected by the provision, for example, of a photosensitive resin.
However, since a photosensitive resin is electrically insulating, and mounting while it remains on the bumps is not possible, it is necessary to remove the photosensitive resin from the top of the bumps. Here, in order to remove a part of the photosensitive resin, lithography must be applied, and this results in the problem of an increased number of steps.
In this way, a conventional semiconductor device suffers from inferior efficiency in the process from fabrication to mounting.
The invention has as its object the solution of the above described problems, and this object subsists in the provision of an electronic component and a semiconductor device, a method of making the same and method of mounting the same, a circuit board, and an electronic instrument such that the process from fabrication to mounting can be carried out efficiently.
DISCLOSURE OF INVENTION
The method of making a semiconductor device of the invention comprises:
a step of providing a wafer on which are formed electrodes;
a step of providing a stress relieving layer on the wafer in such a way as to avoid at least a part of the electrodes;
a step of forming wiring over the stress relieving layer from the electrodes;
a step of forming external electrodes connected to the wiring above the stress relieving layer; and
a step of cutting the wafer into individual pieces.
According to the invention, the stress relieving layer is formed on the wafer, and further thereon the wiring and external electrodes are laminated, so that the fabrication process proceeds as far as forming the semiconductor package while still in the wafer stage; this obviates the need for a substrate such as a patterned film with preformed external electrodes.
Here, the stress relieving layer refers to a layer which relieves the stress caused by distortion between the motherboard (mounting board) and semiconductor chip. For example, such stresses may be generated when the semiconductor device is mounted on the mounting board and when subsequently heat is applied. As the stress relieving layer is selected a material which is flexible or a gel material.
Besides, since the wiring between the electrodes and the external electrodes can be formed freely according to the requirements of the design, the layout of the external electrodes can be determined regardless of the layout of the electrodes. As a result, without changing the circuit design of the elements formed on the wafer, various semiconductor devices with the external electrodes in different positions can easily be fabricated.
Furthermore, according to the invention, after the stress relieving layer, wiring and external electrodes are formed on the wafer, the wafer is cut, to obtain individual semiconductor devices. As a result, the formation of the stress relieving layer, wiring and external electrodes on a large number of semiconductor devices can be carried out simultaneously, which is preferable when quantity production is considered.
As the stress relieving layer is used, for example, a resin with a Young's modulus of not more than 1×10
10
Pa.
In the step of providing the stress relieving layer, a photosensitive resin may be applied to the wafer in such as way as to include the electrodes, and the photosensitive resin may be removed from the region corresponding to the electrodes, whereby the stress relieving layer may be provided.
The stress relieving layer may be provided by printing the resin constituting the stress relieving layer.
The photosensitive resin may be selected from the set consisting of polyimide resin, silicone resin, and epoxy resin.
The stress relieving layer may have a plate with holes formed corresponding to the electrodes adhered to the wafer; and the plate may have a coefficient of thermal expansion intermediate between those of the semiconductor chip and a circuit board on which the semiconductor chip is mounted.
By this means, since the coefficient of thermal expansion of the plate is intermediate between the coefficient of thermal expansion of the semiconductor chip and the coefficient of thermal expansion of the board, stress generated by differences in the coefficient of thermal expansion values can be absorbed. Besides, since the plate used here simply has holes formed therein, its formation is simpler than that of a patterned substrate.
The stress relieving layer may be formed of a resin in a plate form, and the plate form of resin may be adhered to the wafer.
By this means, in contradistinction to a patterned substrate, the required form can be formed easily.
The wafer used in the step of providing the wafer may have formed an insulating film, except in the regions of the electrodes and the region cut in the step of cutting.
Before the step of forming wiring, there may further be a step of roughening the surface of the stress relieving layer.
After the step of forming external electrodes and before the step of cutting, there may further be a step of applying a photosensitive resin to form a film on the surface of formation of the external electrodes to include the external electrodes, and a step of carrying out isotropic etching with respect to the photosensitive resin until the external electrodes are exposed.
After the step of forming external electrodes and before the step of cutting, there may further be a step of applying an organic film to form a film on the surface of formation of the external electrodes to include the external electrodes.
As the organic film may be used a flux such that when heated the residue is changed by a chemical reaction into a thermoplastic polymer resin.
The wiring may be bent over the stress relieving layer.
At the junction of the wiring and the electrodes, the width of the wiring may be greater than the width of the electrodes.
In the invention, the stress relieving layer may be formed, and over the stress relieving layer the wiring may be formed, and thereafter a solder portion may be formed by electroless plating, and the solder portion may be formed into the external electrodes.
In the invention there may further be:
a step in which the stress r
Malsawma Lex H.
Oliff & Berridg,e PLC
Seiko Epson Corporation
Smith Matthew
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