Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-09-27
2002-11-12
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S351000, C257S355000, C257S360000
Reexamination Certificate
active
06479869
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a semiconductor device which has internal circuits, wherein each internal circuit is surrounded by an associated guard ring, and more particularly, to a semiconductor device that utilizes guard rings to provide enhanced protection for the internal circuits to prevent breakdown due to electrostatic discharge (ESD) or the like.
Such semiconductor devices, for example, may be typical semiconductor integrated circuit (IC) devices, and more specifically, may include multi-function large scaled integrated (LSI) circuit devices, digital and analog hybrid LSIs, multi-powered digital LSIs, gate affays, custom LSIs, ASICs (application specific IC), and so on.
2. Description of the Related Art
Many ICs are formed with a guard ring that surrounds an internal circuit in order to prevent undesired noise from propagating into the internal circuit, to stabilize a potential state in a substrate and wells, and so on. However, since the guard ring alone tends to be insufficient for ESD protection, short-circuit protection circuits comprised of diodes and so on are often provided on power lines for supplying operating power to the internal circuits for purposes of enhancing the ESD protection for the internal circuits.
Also known are techniques for forming lateral thyristors as an ESD protection circuit provided in IC (see, for example, JP-A-5-160349 and 9-8147).
Conventional devices are disadvantageous in that a short-circuit protection circuit and an ESD protection circuit occupy dedicated semiconductor areas, so that a large area is required for ensuring a sufficient protection capability. For this reason, it is not possible to collectively protect internal circuits, in which a large number of elements are integrated, in the form of a block because there are limitations to the area available for providing protection circuits and the quantity of protection circuits required.
However, since the trend of miniaturization and faster operation of internal circuits is still advancing without limits, and the internal circuits suffer from lower resistance resulting from this trend, sufficient protection can no longer be ensured only by repeating the conventional approaches of increasing the number of protection circuits as mentioned.
Thus, there is a technical problem in the art in creating a semiconductor device structure that is capable of strongly protecting internal circuits from electrostatic breakdown and other harmful effects while at the same time minimizing the area occupied by protection circuits.
SUMMARY OF THE INVENTION
In view of the above problems, a semiconductor device according to the invention is resistant to electrostatic breakdown by utilizing guard rings to form active elements for enhancing the protection capability.
A semiconductor device according to the invention includes a substrate as described below, a plurality of external connection terminals, internal circuits, power lines, guard rings, and active elements for enhancing the protection capability. The substrate is formed in one chip, and has a circuit formation region allocated to one surface thereof Outside the circuit formation region, the external connection terminals are provided. The internal circuits are each connected to some of the external connection terminals and to some of the power lines, and surrounded by a guard ring formed in the region associated with the internal circuit. Further, each of the active elements, which are formed parasitic to the guard ring, is connected to the associated power line such that it maintains a blocking state when a voltage applied from the power line is equal to or lower than a proper operating voltage of the internal circuit associated therewith, and becomes conductive when the applied voltage exceeds the proper operating voltage of the internal circuit before the applied voltage reaches a breakdown voltage of the associated internal circuit.
REFERENCES:
patent: 5717559 (1998-02-01), Narita
patent: 5-160349 (1993-06-01), None
patent: 9-8147 (1997-01-01), None
Morgan & Lewis & Bockius, LLP
Rohm & Co., Ltd.
Wojciechowicz Edward
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