Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-11-14
2002-11-12
Zarabian, Amir (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S192000, C257S349000, C257S373000, C257S607000
Reexamination Certificate
active
06479866
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to semiconductor-on-insulator (SOI) devices and methods of making, and more specifically to SOI transistor devices having reduced floating body effects.
2. Description of the Related Art
Conventional or bulk semiconductor devices are formed in semiconductor material by implanting a well of either P-type or N-type conductivity silicon in a silicon substrate wafer of the opposite conductivity. Gates and source/drain diffusions are then manufactured using commonly known processes. These form devices known as metal-oxide-semiconductor (MOS) field effect transistors (FETs). When a given chip uses both P-type and N-type, it is known as a complimentary metal oxide semiconductor (CMOS). Each of these transistors must be electrically isolated from the others in order to avoid shorting the circuits. A relatively large amount of surface area is needed for the electrical isolation of the various transistors. This is undesirable for the current industry goals for size reduction. Additionally, junction capacitance between the source/drain and the bulk substrate and “off” state leakage from the drain to the source both increase power consumption. Junction capacitance also slows the speed at which a device using such transistors can operate. These problems result in difficulties in reducing the size, power consumption, and voltage of CMOS technology devices.
In order to deal with the junction capacitance and “off state” leakage problem as well as obtain reduced size, semiconductor-on-insulator technology (SOI) has been gaining popularity. A SOI wafer may be formed from a bulk silicon wafer by using conventional oxygen implantation techniques to create a buried oxide layer at a predetermined depth below the surface. The implanted oxygen oxidizes the silicon into insulating silicon dioxide in a gaussian distribution pattern centered at the predetermined depth to form the buried oxide layer. Field effect transistors formed on SOI substrates also may be able to achieve higher speed operation with higher drive currents, when compared with FETs formed on conventional bulk silicon substrates.
However, one problem with forming field effect transistors on an SOI wafer is the floating body effect. The floating body effect occurs because the buried oxide layer isolates the channel, or body, of the transistor from the fixed potential silicon substrate and therefore the body takes on charge based on recent operation of the transistor. The floating body effect causes the current-to-voltage curve for the transistor to distort or kink, which in turn causes the threshold voltage for operating the transistor to fluctuate. This problem is particularly apparent for passgate devices such as those used in dynamic random access memory (DRAM) wherein it is critical that the threshold voltage remain fixed such that the transistor remains in the “off” position to prevent charge leakage from the storage capacitor.
Accordingly, there is a strong need in the art for a semiconductor circuit structure, and a method for forming such structure, that includes the low junction capacitance and low “off” state leakage characteristics of the SOI FET based circuits but does not suffer the disadvantages of a floating body potential.
SUMMARY OF THE INVENTION
A transistor on an SOI wafer has a subsurface recombination area at least partially within its body. The recombination area includes one or more damaged recombination regions. The damaged recombination region(s) may be formed by a damaging implant into a surface semiconductor layer, for example through an open portion of a doping mask, the opening portion created for example by removal of a dummy gate. Alignment of the damaged recombination region(s) is improved by forming the source and drain of the transistor prior to removal of the dummy gate, using the dummy gate as a doping mask.
According to an aspect of the invention, a semiconductor-on-insulator (SOI) transistor device includes an insulating layer made of an insulating material; an active layer of semiconductor material atop the insulating layer, the active layer including a body between a source and a drain, wherein the source and the drain are of a same conductivity type, and wherein the body is of an opposite conductivity type; and a gate atop the body. The body includes a damaged area therein, and the damaged area is not in contact with the source or the drain.
According to another aspect of the invention, a semiconductor-on-insulator (SOI) transistor device includes an insulating layer made of an insulating material; an active layer of semiconductor material atop the insulating layer, the active layer including a body between a source and a drain, wherein the source and the drain are of a same conductivity type, and wherein the body is of an opposite conductivity type; a gate atop the body; and a recombination region along the interface between the body and the insulating layer. The recombination region is fully underneath the gate.
According to still another aspect of the invention, a method of producing a semiconductor-on-insulator (SOI) transistor device includes the steps of forming a subsurface damaged area at least partially in a surface semiconductor layer of an SOI wafer; and forming a gate atop the surface semiconductor layer such that the damaged area is at least partially underneath the gate.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
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Advanced Micro Devices , Inc.
Menz Doug
Renner , Otto, Boisselle & Sklar, LLP
Zarabian Amir
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