Field emission display with pixel current controlled by...

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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C315S169100, C315S334000, C315S350000, C345S077000, C345S074100

Reexamination Certificate

active

06492777

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to matrix-addressable flat panel displays and, more particularly, to a field emission display in which a single transistor located at each row and column intersection controls pixel activation. The invention lends itself to an architecture wherein row and column signal voltages that are compatible with standard integrated circuit logic levels, control a much higher pixel activation voltage.
BACKGROUND OF THE INVENTION
For more than half a century, the cathode ray tube (CRT) has been the principal device for displaying visual information. Although CRTs have been endowed during that period with remarkable display characteristics in the areas of color, brightness, contrast and resolution, they have remained relatively bulky and power hungry. The advent of portable computers has created intense demand for displays which are lightweight, compact, and power efficient. Although liquid crystal displays are now used almost universally for laptop computers, contrast is poor in comparison to CRTs, only a limited range of viewing angles is possible, and in color versions, they consume power at rates which are incompatible with extended battery operation. In addition, color screens tend to be far more costly than CRTs of equal screen size.
As a result of the drawbacks of liquid crystal display technology, thin film field emission display technology has been receiving increasing attention by industry. Flat panel display utilizing such technology employ a matrix-addressable array of pointed, thin-film, cold field emission cathodes in combination with a phosphor-luminescent screen. Somewhat analogous to a cathode ray tube, individual field emission structures are sometimes referred to as vacuum microelectronic triodes. The triode elements are a cathode (emitter tip), a grid (also referred to as the gate), and an anode (typically, the phosphor-coated element to which emitted electrons are directed).
Although the phenomenon of field emission was discovered in the
1950
's, extensive research by many individuals, such as Charles A. Spindt of SRI International, improved the technology to the extent that prospects for its use in the manufacture of inexpensive, low-power, high-resolution, high-contrast, full-color flat displays appeared promising. Realizing that field emission technology was no longer a technology that should be relegated to the care of scientists interested primarily in pure research, a dozen or so companies joined the race to develop a practical flat panel field emission display.
Conventional field emission displays are constructed such that a column signal activates a single conductive strip within the grid, while a row signal activates a conductive strip within the emitter base electrode. At the intersection of an activated column and an activated row, a grid-to-emitter voltage differential sufficient to induce field emission will exist, causing illumination of an associated phosphor on the phosphorescent screen. There are a number of problems associated with this conventional matrix-addressable field-emission display architecture. In order for field emission to occur, the voltage differential between a row conductor and a column conductor must be at least equal to a voltage which will provide acceptable field emission levels. Field emission intensity is highly dependent on several factors, the most important of which is the sharpness of the cathode emitter tip and the intensity of the electric field at the tip. Although a level of field emission suitable for the operation of flat panel displays has been achieved with emitter-to-grid voltages as low as 60 volts (and this figure is expected to decrease in the coming years due to improvements in emitter structure design and fabrication) emission voltages will probably remain far greater than 5 volts, which is the standard CMOS, NMOS, and TTL “
1
” level. Thus, if the field emission threshold voltage is at 60 volts, row and column lines will, most probably, be designed to switch between 0 and either +30 or −30 volts in order to provide an intersection voltage differential of 60 volts. Hence, it will be necessary to perform high-voltage switching as these row and column lines are activated. Not only is there a problem of building drivers to switch such high voltages, but there is also the problem of unnecessary power consumption because of the capacitive coupling of row and column lines. That is to say, the higher the voltage on these lines, the greater the power required to drive the display.
In addition to the problem of high-voltage switching, conventional field emission displays are also prone to low yield and low reliability due to the possibility of emitter-to-grid shorts. Such a short affects the voltage differential between the emitters and grid within the entire array, and may well render the entire array useless, either by consuming so much power that the supply is not able to maintain a voltage differential sufficient to induce field emission, or by actually generating so much heat that a portion of the array is actually destroyed.
A field emission display architecture, which is the subject of U.S. Pat. NO. 5,210,472, overcomes the problems of high-voltage switching and emitter-to-grid shorts, which, in turn, ameliorates the problem of display power consumption. The new architecture (hereinafter referred to as the “dual series-coupled transistor, low-voltage-switching field emission display architecture”) permits the switching of a high pixel activation voltage with low signal voltages that are compatible with standard CMOS, NMOS, or other integrated circuit logic levels. Instead of having rows and columns tied directly to the cathode array, they are used to gate at least one pair of series-connected field effect transistors (FETs), each pair when conductive coupling the base electrode of a single emitter node to a potential that is sufficiently low, with respect to a higher potential applied to the grid, to induce field emission. Each row-column intersection (i.e. pixel) within the display may contain multiple emitter nodes in order to improve manufacturing yield and product reliability. In a preferred embodiment, the grid of the array is held at a constant potential (V
FE
), which is consistent with reliable field emission when the emitters are at ground potential. A multiplicity of emitter nodes are employed, one or more of which correspond to a single pixel (i.e., row and column intersection). Each emitter node has its own base electrode, which is groundable through its own pair of series-coupled field-effect transistors by applying a signal voltage to both the row and column lines associated with that emitter node. One of the series-connected FETs is gated by a signal on the row line; the other FET is gated by a signal on the column line. Also in the preferred embodiment of the invention, each emitter node contains multiple cathode emitters. Hence, each row-column intersection controls multiple pairs of series-coupled FETs, and each pair controls a single emitter node (pixel) containing multiple emitters.
The regulation of cathode-to-grid current has become a major issue in the design of field emission displays, as the issues of cathode life expectancy, low power consumption, and stability requirements are addressed.
The issue of current regulation has been addressed with respect to conventionally constructed flat panel field emission displays, such as the one depicted in FIG.
1
. For example, in U.S. Pat. No. 4,940,916, Michel Borel and three colleagues disclose a field emission display having a resistive layer between each cathode (emitter tip) and an underlying conductive layer. In a subsequent U.S. Pat. No. 5,162,704, Yoichi Bobori and Mitsuru Tanaka disclose a field emission display having a diode in series with each emitter tip.
In U.S. patent application Ser. No. 08/011,927, now issued as U.S. Pat. No. 5,357,172, a method is disclosed for reducing power consumption and enhancing reliability and stability in the low-voltage switching field emissio

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