Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2001-03-13
2002-12-17
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S737000, C257S701000
Reexamination Certificate
active
06495922
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-070211, filed Mar. 14, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device using a film type thin insulating substrate as an interposer, and in particular, to a semiconductor device which is adapted to be employed in a thin semiconductor package or in antenna circuit board of an RFID (Radio Frequency Identification) device.
A semiconductor device using a film type interposer according to the prior art includes generally a semiconductor element (hereinafter referred to as a chip) having a plurality of pads, protruded bumps bonded to the pads respectively, and an interposer composed of an insulating film substrate having wiring layers formed of a patterned metal foil, the wiring layers being electrically connected to the bumps.
There are known several kinds of film type interposers which are adapted to be employed in a semiconductor device. Generally, these film type interposers are called an FPC (Flexible Printed Circuit board) and provided in such a manner that a metal foil such as a copper or aluminum foil is adhered onto an insulating polyimide film or an insulating PET film and that the metal foil is etched to provide conductive circuits composed of a large number of conductive layers.
As for the method of bonding a chip to this film substrate, there is known a bonding method wherein a metallic bump is formed on each pad of the chip and then, the chip is bonded to the film substrate by using an ACF (anisotropic conductive film).
FIG. 16A
shows a perspective view of a chip according to the prior art, and
FIG. 16B
shows a cross-sectional view taken along the line
16
B-
16
B of FIG.
16
A. Referring to
FIGS. 16A and 16B
, on a peripheral region of main surface of a chip
101
made of a silicon semiconductor, there are provided a plurality of pads
102
of aluminum, on each of which a plated bump
103
by gold plating is provided. As for the method of forming this bump
103
, there is known a method wherein a conductive film called a barrier metal is formed on the main surface of the chip
101
, a plating mask is formed using a photoresist, and bumps are selectively formed on the barrier metal by means of electroplating, unwanted portions of barrier metal layer being subsequently removed.
FIG. 17A
shows a perspective view of another example of a chip according to the prior art, and
FIG. 17B
shows a cross-sectional view taken along the line
17
B-
17
B of FIG.
17
A. Referring to
FIGS. 17A and 17B
, on a peripheral region of a surface of a chip
101
made of a silicon semiconductor, there are formed a plurality of pads
102
of aluminum, on each of which a stud bump
104
is provided. The stud bump
104
is formed through the stud bonding of an Au wire, the top surface of the resultant stud being subsequently pressed. More specifically, the stud bump
104
is formed by a method wherein an electrode called a torch rod is placed near a tip of Au wire, and a high voltage is applied between the torch rod and the tip of Au wire to generate a spark discharge therebetween, thereby heating the tip of the Au wire so as to provide a ball which is then pressed to the pad
102
of the chip, using a bonding tool having a capillary, the remainder of the Au wire being then pulled up, and the top surface of the bump thus formed being subsequently pressed to provide the bump.
FIG. 18A
shows a perspective view of a film substrate wherein an ACF is adhered onto an insulating film substrate having aluminum wiring layers, and
FIG. 18B
shows a cross-sectional view taken along the line
18
B—
18
B of FIG.
18
A. Referring to
FIGS. 18A
and
18
B, on the surface of an insulating film substrate
105
of a polyimide film, there is formed an adhesive layer
108
, on which aluminum wiring layers
106
are provided. Further, an ACF
107
is provided over the adhesive layer
108
to cover an end of each of the leads for providing the aluminum wiring layers
106
.
FIG. 19A
shows a perspective view of a device wherein a chip having bumps, which are attached to the chip by the method illustrated in
FIGS. 16A and 16B
, or in
FIGS. 17A and 17B
, is placed via an ACF onto an insulating film substrate, and then bonded to the insulating film substrate, thereby electrically connecting the bumps to the wiring layers of the insulating film substrate.
FIG. 19B
shows a cross-sectional view taken along the line
19
B—
19
B of FIG.
19
A.
FIG. 20
is an enlarged cross-sectional view of
FIG. 19B
, illustrating the bonded portion between the chip and the insulating film substrate. Referring to
FIGS. 19A
,
19
B and
20
, in the same manner as the case of bonding of a flip chip, the chip
101
having the bumps
104
is aligned with the wiring layers
106
of the insulating film substrate
105
, and bonded thereto under a heated condition so as to cure the resin of the ACF
107
, thereby executing not only the bonding of the chip
101
but also the electrical connection between the bumps (stud bumps)
104
and the aluminum wiring layers
106
. By the way, the electrical connection between the stud bumps
104
and the aluminum wiring layers
106
is carried out through metallic particles
109
dispersed in the ACF
107
.
As described above, the electrical connection between the bumps formed on the pads of chip and the insulating film substrate is realized through the metallic particles
109
added to the ACF
107
. For example, in the case of FC
262
B (ACF, a product from Hitachi Kasei Co., Ltd.), a resin containing a main component of the FC
262
B is cured at a temperature of 180° C. for about 30 seconds. Further, since a suitable amount of Ni particles having a particle size of about 5 to 20 &mgr;m is contained in the FC
262
B as the metallic particles, the electrical connection between the aluminum wiring layers of the insulating film substrate and the bumps of the chip can be provided. Additionally, since the chip and the insulating film substrate are bonded to each other by heating and pressing, the Ni particles are enabled to thrust into the aluminum wiring layers of the insulating film substrate, thereby breaking the oxide film formed on the surface of aluminum wiring layers and making it possible to provide the electric conduction between the bumps and the aluminum wiring layers. However, it has been found through a reliability test such as a temperature cycling test that an oxide film tends to be newly formed on a surface of an easily oxidizable aluminum layer, thereby giving rise to conduction failure. Further, there is also known a paste type anisotropic conductive resin other than the aforementioned film type anisotropic conductive resin. However, since this paste type anisotropic conductive resin also contains metallic particles, problems such as the sedimentation of metallic particles would be caused to occur, thus deteriorating the yield in the electrical connection between the bumps and the aluminum wiring layers.
Next, other problems accompanied with the conventional interposer will be explained with reference to
FIGS. 21
to
23
.
FIG. 21
illustrates a perspective view of a conventional insulating film substrate having aluminum wiring layers on both surfaces, to which a chip is connected in the same manner as the bonding of the flip chip.
FIG. 22
illustrates a cross-sectional view of an insulating film substrate having through-holes, wherein aluminum wiring layers provided on both surfaces of the substrate are connected to each other through the plated through-hole.
FIG. 23
illustrates a cross-sectional view of an insulating film substrate having wiring layers on both surfaces, wherein the aluminum wiring layers are connected to each other by mechanical caulking.
FIG. 21
shows a perspective view an opposite surface of an insulating film substrate
105
having wiring layers on both sides. Namely, a
Ikemizu Morihiko
Yokoi Tetsuya
Kabushiki Kaisha Toshiba
Potter Roy
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