Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2000-12-26
2002-08-20
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S758000, C438S622000
Reexamination Certificate
active
06437432
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor devices and methods of producing the same, and more particularly to a semiconductor device having a chip size package (CSP) structure and a method of producing the same.
Recently, attempts have been made to produce a smaller size semiconductor device having a higher density in order to meet a demand for a smaller electronic device and apparatus. Proposed as such a smaller size semiconductor device is a semiconductor device having a so-called CSP structure, which is downsized by being shaped as close to a semiconductor element (chip) as possible.
A downsized high-density semiconductor device with an increased number of pins requires pitches between its external connection terminals to be narrowed. Therefore, a protrusion electrode (bump) is employed as an external connection terminal so that a relatively large number of external connection electrodes can be formed in a reduced space.
2. Description of the Related Art
FIGS. 1 and 2
show a conventional semiconductor device
10
.
FIG. 1
is a sectional view of the semiconductor device
10
and
FIG. 2
is a plan view of the semiconductor device
10
without a sealing resin
14
. The semiconductor device
10
is downsized by being formed to have the CSP structure. The semiconductor device
10
includes a semiconductor substrate
11
in a chip state, interconnection lines
18
, protrusion electrodes for signal (hereinafter, protrusion signal electrodes)
12
, protrusion electrodes for ground (hereinafter, protrusion ground electrodes)
13
and the sealing resin
14
.
The upper surface of the semiconductor substrate
11
in
FIG. 1
is a circuit-containing surface on which a circuit including pads for signal (hereinafter, signal pads)
15
and pads for ground (hereinafter, ground pads)
16
is formed. An insulating film is formed on the circuit-containing surface except for the positions where the signal and ground pads
15
and
16
are formed. The insulating film provides protection for the circuit-containing surface.
The interconnection lines
18
are formed directly on the upper surface of the insulating film
17
in a predetermined pattern. One end portion of each of the interconnection lines
18
is connected to one of the signal pads
15
or the ground pads
16
, while one of the protrusion signal electrodes
12
or the protrusion ground electrodes
13
is formed on the other end portion of each of the interconnection lines
18
. The protrusion signal and ground electrodes
12
and
13
serve as the external connection terminals of the semiconductor device
10
.
Further, the sealing resin
14
is formed to cover the circuit-containing surface of the semiconductor substrate
11
so as to protect the insulating film
17
, the interconnection lines
18
, and the protrusion signal and ground electrodes
12
and
13
. However, the upper end surfaces of the protrusion signal and ground electrodes
12
and
13
are uncovered and appear from the sealing resin
14
.
As described above, the semiconductor device
10
having the conventional CSP structure has the interconnection lines
18
formed on the insulating film
17
so as to electrically connect the signal and ground pads
15
and
16
and the corresponding protrusion signal and ground electrodes
12
and
13
. The interconnection lines
18
serve as interposers, thus allowing the signal and ground pads
15
and
16
to be formed at a distance from the protrusion signal and ground electrodes
12
and
13
. This gives more latitude in determining where to dispose the protruding signal and ground electrodes
12
and
13
, and also allows the semiconductor device
10
to accommodate an increased number of pins.
However, according to the conventional semiconductor device
10
, the interconnection lines
18
serving as the interposers each have a single-layer structure, thus restricting the layout of the interconnection lines
18
. Therefore, a layout of the interconnection lines
18
considering an electrical characteristic is prevented from being formed. In other words, the semiconductor device
10
having the conventional CSP structure is downsized to have only a limited region for forming the interconnection lines
18
. Forming a large number of the interconnection lines
18
in the region would require each of the interconnection lines
18
to have a narrower line width, thus causing the impedance of each of the interconnection lines
18
to become higher.
On the other hand, a high-frequency clock has been employed in the semiconductor substrate
11
to meet a demand for a higher processing speed. Therefore, a signal input to or output from each of the signal pads
15
via a corresponding one of the interconnection lines
18
becomes a high-frequency signal, which may generate interference between adjacent two of the interconnection lines
18
. Thus, the restriction on the layout of the interconnection lines
18
prevents the semiconductor device
10
having the conventional CSP structure from realizing the higher processing speed.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide a semiconductor device in which the above disadvantages are eliminated and a method of producing the same.
A more specific object of the present invention is to provide a semiconductor device having an improved electrical characteristic and a method of producing the same.
The above objects of the present invention are achieved by a semiconductor device including a semiconductor substrate including a plurality of signal pads and ground pads, an insulating film formed on the semiconductor substrate, a conductive metal film formed on the insulating film and electrically connected to the ground pads and a plurality of first interconnection lines electrically connected to the signal pads and insulated from the conductive metal film, wherein the conductive metal film is formed over a region including the first interconnection lines in a plan view of the semiconductor device.
According to the above-described semiconductor device, since the conductive metal film is formed to be electrically connected to the ground pads, the conductive metal film can be employed as a ground layer having a ground potential. Further, the conductive metal film is formed over the region including the interconnection lines in the plan view of the semiconductor device. Therefore, the conductive metal film can be formed over a wide area without being restricted by the positions of the interconnection lines.
As is known, an electrical resistance is inversely proportional to the cross-sectional area of a conductive material. Therefore, the wide formation area of the conductive metal film, that is, the wide cross-sectional area of a ground, lowers a ground impedance. As a result, the semiconductor device is provided with an improved electrical characteristic so as to become a fast semiconductor device employing a high frequency. Since the conductive metal film is electrically insulated from the interconnection lines, the conductive metal film does not cause a short circuit between the interconnection lines and the ground.
The above objects of the present invention are also achieved by a semiconductor device including a semiconductor substrate including a plurality of signal pads and ground pads, an insulating film formed on the semiconductor substrate, a conductive metal film electrically connected to the ground pads, a plurality of first interconnection lines electrically connected to the signal pads and insulated from the conductive metal film and a plurality of metal films electrically connected to the first interconnection lines and insulated from the conductive metal film, wherein the conductive metal film is formed over a region including the first interconnection lines in a plan view of the semiconductor device.
The above objects of the present invention are also achieved by a semiconductor device including a semiconductor substrate including a plurality of signal pads and ground pads, a
Fukasawa Norio
Ikumo Masamitsu
Kawahara Toshimi
Nagashige Kenichi
Clark Sheila V.
Fujitsu Limited
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