Substrate bias generator in a dynamic random access memory with

Details Substrate bias generator in a dynamic random access memory with Substrate bias generator in a dynamic random access memory with

1989-07-18

1990-10-02

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365222, 3072962, G11C 11403

Patent

active

049611674

ABSTRACT:
A dynamic random access memory with self-refresh function, which includes a substrate bias generator (100) adapted to be intermittently driven to apply a bias potential to a semiconductor substrate (15). This memory device comprises a circuit (91) for generating an internal refresh instruction signal (.phi..sub.S) in response to an external refresh instruction signal, a circuit (92, 93) which, in response to the internal refresh instruction signal, generates a refresh enable signal (.phi..sub.R) intermittently at a predetermined interval, a circuit (94, 95, 96, 98) which, in response to the refresh enable signal, refreshes data in the memory cells, and a circuit (99) which, in response to the internal refresh instruction signal and refresh enable signal, activates the substrate bias generator in the same cycle as the cycle of generation of the refresh enable signal and only for a time shorter than the cycle of generation of the refresh enable signal. The above construction contributes to a reduced power consumption in the dynamic random access memory.

REFERENCES:
patent: 4839867 (1989-06-01), Poehnitzsch
patent: 4849936 (1989-07-01), Mizutani
patent: 4887240 (1989-12-01), Garverick et al.
Yamada et al., "A 64K Bit MOS Dynamic RAM with Auto/Self Refresh Functions", The Transactions of the Institute of Electronics and Communication Engineers, Japan, vol. J66-C, No. 1, Jan. 1983, pp. 62-69.
Taniguchi et al., "Fully Boosted 64K Dynamic RAM wit Automatic and Self-Refresh" IEEE Journal of Solid State Circuits, vol. SC-16, No. 5, Oct. 1981, pp. 492-498.

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