Electrooptical device, substrate for driving electrooptical...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S059000, C257S072000, C257S351000

Reexamination Certificate

active

06351010

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electrooptical devices, substrates for driving the electrooptical devices and methods for making the electrooptical devices and the substrates. In particular, the present invention relates to a configuration having an active region of a bottom-gate-type thin-film insulating-gate field-effect transistor (hereinafter referred to as bottom-gate-type MOSTFT) using a single-crystal silicon layer, grown by heteroepitaxy on an insulating substrate, and a passive region. Herein, the bottom-gate types include an inverted NSI stagger type and an inverted ISI type. This configuration is suitable for liquid crystal displays etc.
2. Description of the Related Art
Various types of active-matrix liquid crystal displays are known. For example, a liquid crystal display has a display region using amorphous silicon for TFTs and ICs for external driving circuits. Another type of liquid crystal display integrates a display section using solid phase deposition polycrystalline silicon TFTs and driving circuits, as disclosed in Japanese Patent Application Laid-Open No. 6-242433. Integration of a display section using excimer laser annealing polycrystalline silicon TFTs and driving circuits is also known in Japanese Patent Application Laid-Open No. 7-131030.
Although conventional amorphous silicon TFTs have high productivity, they are not suitable for production of p-channel MOSTFTs (hereinafter referred to as pMOSTFTs) due to a low electron mobility of 0.5 to 1.0 cm
2
/v·sec. Since a peripheral driving section using pMOSTFTs and a display section cannot be formed on the same substrate, the driver IC should be an external component, which is mounted by, for example, a tape automated bonding (TAB) method, which has high production costs. This configuration inhibits production of high-resolution devices. Furthermore, the small electron mobility, as described above, causes a small ON current; hence, the size of the transistors in the display section is inevitably large, resulting in a small aperture ratio of pixels.
Conventional polycrystalline silicon TFTs have an electron mobility of 70 to 100 cm
2
/v·sec and can facilitate production of high-resolution devices. Thus, liquid crystal displays (LCDS) which use polycrystalline silicon and are integrated with driving circuits have attracted attention. The above electron mobility, however, is insufficient for driving a large LCD of 15 inches or more, and thus ICs for an external driving circuit are required.
TFTs using polycrystalline silicon formed by a solid-phase deposition process require annealing at a temperature of 600° C. or more for several tens of hours and thermal oxidation at approximately 1,000° C. to from a gate SiO
2
layer. Thus, the production of such TFTs requires using a semiconductor production system. Thus, the wafer size is limited to 8 to 12 inches and the use of expensive heat-resistant quartz glass is inevitable, resulting in high production cost. Thus, the use of such TFTs is limited to electronic viewfinders (EVF) and audiovisual (AV) projectors.
Polycrystalline silicon TFTs produced by excimer laser annealing have many problems, including unstable output of the excimer lasers, low productivity, increasing price of the apparatus with increasing size, low yield and low quality. These problems are pronounced when large glass substrates having a side of, for example, 1 meter are used.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an integrated display panel configuration of a display section and a peripheral driving circuit having high image quality, high resolution, a narrow peripheral frame, high efficiency and a large screen.
It is another object of the present invention to provide an integrated display panel configuration capable of using a large glass substrate having a relatively low distortion point, which is produced with high efficiency, and which does not require expensive production facilities.
It is another object of the present invention to provide an integrated display panel configuration enabling easy adjustment of the threshold voltage of the device, which has low resistance capable of high speed operation, and having a large screen.
Each of an electrooptical device and a driving substrate for the electrooptical device includes a first substrate (substrate for drive) having a display section provided with pixel electrodes and a peripheral-driving-circuit section provided on the periphery of the display section, a second substrate (counter substrate), and an optical material disposed between the first substrate and the second substrate. A gate section including a gate electrode and a gate-insulating film is formed on one surface of the first substrate, a compound layer having high lattice matching with single-crystal silicon is formed on the surface of the first substrate, and a single-crystal silicon layer is formed on the first substrate including the compound layer and the gate section. The single-crystal silicon layer constitutes a channel region, a source region, and a drain region. In addition, a first bottom-gate thin-film transistor having the gate section is formed below the channel region, the first bottom-gate thin-film transistor constituting at least a part of the peripheral-driving-circuit section.
The thin-film transistor in accordance with the present invention may be a field effect transistor (FET) or a bipolar transistor, and the field effect transistor may be a MOS type or a junction type.
Another aspect of the present invention is a method for making the electrooptical device or the driving substrate for the electrooptical device. The method includes a step for forming a gate section comprising a gate electrode and a gate-insulating film on one surface of the first substrate; a step forming a compound layer having high lattice matching with the single-crystal silicon on the surface of the first substrate; a deposition step for heteroepitaxially depositing a single-crystal silicon layer on the first substrate having the step and the gate section by a catalytic CVD process or a high-density plasma-enhanced CVD process using the compound layer as a seed; a step for treating the single-crystal silicon layer through a predetermined process to form a channel region, a source region and a drain region; and a step for forming a bottom-gate first thin-film transistor having the gate section below the channel region and constituting at least a part of the peripheral-driving-circuit section.
In accordance with the present invention, a single-crystal silicon layer is formed by heteroepitaxy on a substrate using a compound layer, such as a crystalline sapphire film, having high lattice matching with single crystal silicon, as a seed, by a catalytic CVD process or a high-density plasma-enhanced CVD process, and is used for bottom-gate MOSTFTs in a peripheral driving circuit of a driving substrate, such as an active-matrix substrate, and bottom-gate MOSTFTs in a peripheral driving circuit of an electrooptical device, such as a liquid crystal device (LCD) integrating a display section and the peripheral driving circuit. The following points (A) to (G) are advantages in the present invention. (A) A single-crystal silicon layer having a high electron mobility of 540 cm
2
/v·sec or more is deposited by heteroepitaxy using a compound layer formed on a substrate as a seed having high lattice matching with the single crystal silicon. Thus, an electrooptical device, such as a display thin-film semiconductor device having a high-speed driver, can be produced.
(B) Since the single-crystal silicon layer has high electron and hole mobility comparable to a single-crystal silicon substrate, single-crystal silicon bottom-gate MOSTFTs can form an integrated configuration of a display section including nMOSTFTs, pMOSTFTs or cMOSTFTs having high switching characteristics and a lightly-doped drain (LDD) structure moderating the electric field intensity and the leakage current and a peripheral driving circuit includi

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