Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
1998-10-14
2002-02-19
Bowers, Jr., Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S486000
Reexamination Certificate
active
06348368
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device using a semiconductor thin film, and particularly to a method of manufacturing a semiconductor device constituted by a thin film transistor (TFT) using a crystalline silicon film.
In the present specification, “semiconductor” device means any device functioning by using a semiconductor, and not only a simple component such as a TFT but also an electro-optical device, a semiconductor circuit, and electronic equipment provided with those.
2. Description of the Related Art
In recent years, a TFT used for an electro-optical device such as an active matrix type liquid crystal display device has been actively developed.
The active matrix type liquid crystal display device is a monolithic display device in which a pixel matrix circuit and a driver circuit are provided on the same substrate. Moreover, a system-on-panel having built-in logic circuits, such as a y correction circuit, a memory circuit, and a clock generation circuit, has been also developed.
Since such a driver circuit and a logic circuit are required to perform high speed operation, it is improper to use an amorphous silicon film as an active layer. Thus, in the present circumstances, a TFT using a crystalline silicon film (polysilicon film) as an active layer has become the mainstream.
The present inventors disclose the technique for obtaining a crystalline silicon film on a glass substrate in Japanese Patent Laid-Open 8-78329. In the technique disclosed in the publication, a catalytic element for facilitating crystallization is selectively added in an amorphous silicon film, and a heat treatment is carried out to form a crystalline silicon film extending from an added region.
According to this technique, a crystallizing temperature of an amorphous silicon film can be lowered by 50 to 100° C. by action of the catalytic element, and a time required for crystallization can also be reduced to ⅕ to {fraction (1/10)}. Since the crystallization of the silicon film progresses almost parallel to the surface of a substrate toward a lateral direction, the present inventors et al. refer to this crystallized region as a lateral growth region.
Since the catalytic element is not directly added in the lateral growth region, the region has a feature that the concentration of the catalytic element remaining in the film is low as compared with the case where the catalytic element is directly added. For example, although the content of the catalytic element is in the order of 10
19
in the case of direct addition, the content in the lateral growth region is in the order of 10
18
which is smaller by one figure.
Although it becomes possible to obtain a silicon film having excellent crystallinity by the above crystallizing technique at a relatively low temperature, since the catalytic element is included in the film, the control of the amount of the addition is subtle, and a problem has occurred in the reproducibility and stability (stability in electrical characteristics of a device obtained).
Besides, there has also occurred a problem that change of characteristics of the obtained semiconductor device with the lapse of time and the dispersion of OFF values (off current) as characteristic values of the TFT are large by the influence of the catalytic element remaining in the film.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device with high performance by a TFT having excellent electrical characteristics and realized by removing a catalytic element remaining in a film as described above.
According to an aspect of the present invention, a method of manufacturing a semiconductor device comprises the steps of: adding a catalytic element for facilitating crystallization of an amorphous semiconductor film into a partial region or an entire surface on the amorphous semiconductor film; transforming the partial region or the entire surface of the amorphous semiconductor film into a crystalline semiconductor film by carrying out a first heat treatment; selectively adding an element selected from group
15
into the crystalline semiconductor film; gettering the catalytic element into a region added with the element selected from group
15
from a region adjacent to the added region by carrying out a second heat treatment; forming an active layer by patterning the crystalline semiconductor film; forming an insulating film covering the active layer; and carrying out a heat treatment in an oxidizing atmosphere after formation of the insulating film.
According to another aspect of the present invention, a method of manufacturing a semiconductor device comprises the steps of: selectively forming a mask insulating film on an amorphous semiconductor film; selectively adding a catalytic element for facilitating crystallization of the amorphous semiconductor film into the amorphous semiconductor film by using the mask insulating film; transforming at least a part of the amorphous semiconductor film into a crystalline semiconductor film by carrying out a first heat treatment; selectively adding an element selected from group
15
into the crystalline semiconductor film; gettering the catalytic element into a region added with the element selected from group
15
from a region adjacent to the added region by carrying out a second heat treatment; forming an active layer by patterning the crystalline semiconductor film; forming a gate insulating film covering the active layer; and carrying out a heat treatment in an oxidizing atmosphere after formation of the gate insulating film.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device comprises the steps of: selectively forming a mask insulating film on an amorphous semiconductor film; selectively adding a catalytic element for facilitating crystallization of the amorphous semiconductor film into the amorphous semiconductor film by using the mask insulating film; transforming at least a part of the amorphous semiconductor film into a crystalline semiconductor film by carrying out a first heat treatment; selectively adding an element selected from group
15
into the crystalline semiconductor film by using the mask insulating film as it is; gettering the catalytic element into a region added with the element selected from group
15
from a region adjacent to the added region by carrying out a second heat treatment; forming an active layer by patterning the crystalline semiconductor film; forming a gate insulating film covering the active layer; and carrying out a heat treatment in an oxidizing atmosphere after formation of the gate insulating film.
According to still another aspect of the present invention, a method of manufacturing a semiconductor device comprises the steps of: selectively adding a catalytic element for facilitating crystallization of an amorphous semiconductor film into the amorphous semiconductor film; transforming the amorphous semiconductor film into a crystalline semiconductor film by carrying out a first heat treatment; selectively adding an element selected from group
15
into the crystalline semiconductor film; gettering the catalytic element into a region added with the element selected from group
15
from a region adjacent to the added region by carrying out a second heat treatment; forming an active layer by patterning the crystalline semiconductor film; forming an insulating film covering the active layer; and carrying out a heat treatment in an oxidizing atmosphere after formation of the insulating film.
REFERENCES:
patent: 5550070 (1996-08-01), Funai et al.
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5648277 (1997-07-01), Zhang et al.
patent: 6124154 (2000-09-01), Miyasaka
patent: 5-109737 (1993-04-01), None
patent: 7-130652 (1995-05-01), None
patent: 7-135318 (1995-05-01), None
patent: 7-321339 (1995-12-01), None
patent: 8-78329 (1996-03-01), None
R. Shimokawa and Y. Hayashi, “Characterization of High-Efficiency Cast-Si Solar Cel
Ohtani Hisashi
Yamazaki Shunpei
Bowers, Jr. Charles
Nixon & Peabody LLP
Pert Evan
Robinson Eric J.
Semiconductor Energy Laboratory Co,. Ltd.
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