Reducing reflectivity on a semiconductor wafer by annealing...

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

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C257S763000, C257S764000, C257S765000

Reexamination Certificate

active

06348721

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to methods of reducing reflectance at the surface of a semiconductor wafer. More particularly, the present invention provides a method of producing an anti-reflective layer on a semiconductor by annealing titanium and aluminum.
BACKGROUND OF THE INVENTION
Patterning layers of photoresist using optical lithography to provide desired circuits or other structures on a semiconductor wafer is known. The photoresist material is imaged using a mask having the desired pattern after which a portion of the resist is removed to expose the underlying layer of the semiconductor wafer. Additional processing may then be performed, such as depositing materials in the exposed areas, etc.
To increase speed and performance of integrated circuits, it is desirable to continually decrease the dimensions of structures, such as traces, etc. that are placed in the exposed areas on the wafer. One factor that limits the dimensions in optical lithography is reflection of the light used to expose the photoresist. The reflected list adversely affects the control over dimensions by, for example, exposing photoresist outside of the desired areas which can lead to undercutting. Another undesirable effect of reflections from the underlying surface is the creation of standing waves if the illuminating light is monochromatic. The standing waves can vary the development of the resist material along the edges of the pattern, thereby decreasing the image resolution.
The additional exposed photoresist will result in variations in the desired dimensions of the areas exposed in the photoresist material. As a result, the areas exposed in the photoresist will also vary. Although those variations can be accounted for in the design of the patterns, they do limit the minimum dimensions that can be accurately patterned.
Reflectance problems are particularly troublesome when the layer underneath the photoresist is aluminum. Aluminum is widely used in the manufacture of integrated circuits because of its low melting point, high conductivity and low cost. It is, however, highly reflective which enhances the reflectivity problems discussed above.
One attempt at reducing reflectance of aluminum beneath a layer of photoresist to enhance resolution in optical lithography involves depositing an anti-reflective coating (ARC) on the aluminum, beneath the photoresist, to absorb light reaching the aluminum to prevent it from exposing unwanted areas of photoresist. One example of an anti-reflective coating is amorphous silicon as described in U.S. Pat. No. 5,441,616 to Nanda, et al. Another example is a sputtered layer of TiN as described in U.S. Pat. No. 5,427,666. When using TiN, however, reflectance is typically reduced to about 20% of the incident light and is only that effective over relatively narrow range of wavelengths.
SUMMARY OF THE INVENTION
The present invention provides methods of producing an anti-reflective layer on a semiconductor wafer/device. The anti-reflective layer is produced by annealing layers of titanium and aluminum on a wafer/device to provide a roughened surface that significantly reduces reflectivity to improve the accuracy and definition provided by optical lithography processes.
The annealing can be performed in a nonreactive atmosphere resulting primarily in the formation of Ti
x
Al
1−x
. Alternatively, the annealing can be performed in a nitrogen atmosphere where it results in the formation of primarily Ti
x
Al
1−x
and Ti
x
Al
1−x
N
y
where x and y can be the same or different.
One advantage of the annealing processes and products according to the present invention is that reflectivity can be significantly lowered over a useful range of wavelengths, preferably from about 100 to about 450 nm.
These and other various features and advantages of the invention are more fully shown and described in the drawings and detailed description of this invention, where like reference numerals are used to represent similar parts. It is to be understood, however, that the description and drawings are for the purposes of illustration only and should not be read in a manner that would unduly limit the scope of this invention.


REFERENCES:
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patent: 5066611 (1991-11-01), Yu
patent: 5281850 (1994-01-01), Kanamori
patent: 5427666 (1995-06-01), Mueller et al.
patent: 5441616 (1995-08-01), Nanda et al.
patent: 5635763 (1997-06-01), Inoue et al.
patent: 5700718 (1997-12-01), McTeer
patent: 5838052 (1998-11-01), McTeer
patent: 6069075 (2000-05-01), McTeer
Gardner et al., “Layered and Homogeneous Films of Aluminum and Aluminum/Silicon with Titanium, Zirconium, and Tungsten for Multilevel Interconnects, ”IEDM84:114 (1984).
Pickering et al., “Characterisation of Rough Silicon Surfaces using Spectroscopic Ellipsometry, Reflectance, Scanning Electron Microscopy and Scattering Measurements, ”Materials Science and Engineering, B5: 295-299 (1990).
Lai et al., “The Use of Ti as an Antireflective Coating for the Laser Planarization of AL for VLSI Metallization,” 6thInt'l IEEE VLSI Multilevel Interconnect Conference, Cat. No. 89-Tho259-2, Jun. 12-13, 1989, p. 501.
Lui et al., “Study of Pulsed Laser Planarization of Aluminum for VLSI Metallization, ” 6thInt'l IEEE VLSI Multilevel Interconnect Conference, Cat. No. 89TH0259-2, Jun. 12-13, pp. 329-335.

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