Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-01-16
2002-10-15
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06467071
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a shield circuit designing apparatus and a shield circuit designing method for designing a shield circuit adapted to shield a wire in an integrated circuit.
2. Description of the Related Art
For example, Japanese Laid-Open Patent Application No. 6-314741 discloses a shield circuit designing method according to the related art. A circuit designer specifies a target wire subject to shielding. The target wire and a shielding wire for shielding the target wire are fabricated as a unit such that the shielding wire is connected to a predetermined, constant voltage.
According to the related-art shield circuit designing method as described above, a shield circuit connected to a predetermined, constant voltage can be designed efficiently. However, such a method has a drawback in that a shield circuit in which a shielding wire is driven by a cell cannot be designed easily.
SUMMARY OF THE INVENTION
Accordingly, a general object of the present invention is to provide a shield circuit designing apparatus and a shield circuit designing method in which the aforementioned drawback is eliminated.
Another and more specific object is to provide a shield circuit designing apparatus and a shield circuit designing method capable of efficiently designing a shield circuit in which a shielding wire is driven by a cell, by duplicating and placing cells that drive a specified wire and generating shielding wires connected to the duplicate cells along the specified wire.
Still another and more specific object is to provide a shield circuit designing apparatus and a shield circuit designing method
The aforementioned objects can be achieved a shield circuit designing apparatus for designing a shield circuit for shielding a target wire that requires shielding; cell duplicating and placement means for duplicating a cell that drives the target wire, and for placing duplicate cells; and shield generating means for generating shielding wires connected to the duplicate cells placed by the cell duplicating and placement means, along the target wire.
The cell duplicating and placement means may place the cells having a lower driving capability than the cell that drives the target wire.
The aforementioned can also be achieved by a shield circuit designing apparatus for designing a shield circuit for shielding a target wire that requires shielding, comprising: cell selecting and connecting means for selecting a type of cell adapted to drive shielding wires with a logical value corresponding to a logical value of at least one of inputs to a cell that drives the target wire, and for connecting cells of the selected type to the cell that drives the target wire; additional cell placement means for placing the cells connected by the cell selecting and connecting means; and shield generating-means for generating the shielding wires connected to the cells connected by the cell selecting and connecting means, along the target wire.
The cell selecting and connecting means may select one of an inverter and a buffer.
The cell selecting and connecting means may connect a first cell for driving a first shielding wire and a second cell for driving a second shielding wire in series, and the shield generating means may generate the first and second shielding wires along the target wire.
The cell selecting and connecting means may connect a first cell for driving a first individual shielding wire parallel to a second cell for driving a second individual shielding wire, the first and second individual wring constituting the shielding wire, and the shield generating means may generate the first and second individual wires along the target wire.
The cell selecting and connecting means may select a type of cell having a lower driving capability than the cell that drives the target wire.
The aforementioned objects can also be achieved by a shield circuit designing method for designing a shield circuit for shielding a target wire that requires shielding, comprising the steps of: duplicating a cell that drives a target wire and placing resultant duplicate cells to drive respective shielding wires; and generating the shielding wires connected to the duplicate cells along the target wire.
The cells that drive the shielding wires may have a lower driving capability than the cell that drives the target wire.
The aforementioned objects can also be achieved by a shield circuit designing method for designing a shield circuit for shielding a wire, comprising the steps of: selecting a type of cell adapted to drive shielding wires with a logical value corresponding to a logical value of at least one of inputs to a cell that drives the target wire, and connecting cells of the selected type to the cell that drives the target wire; and placing the cells thus connected; and generating the shielding wires connected to the cells thus connected, along the target wire.
One of an inverter and a buffer may be selected as. the type of cell for driving the shielding wires.
A first cell of the selected type for driving a first shielding wire and a second cell of the selected type for driving a second shielding wire may be connected in series, and the first and second shielding wires may be generated along the target wire.
A first cell for driving a first individual shielding wire may be connected parallel to a second cell for driving a second individual shielding wire, the first and second individual wrings constituting the shielding wire, and the first and second individual wires may be generated along the target wire.
The cells that drive the shielding wires may have a lower driving capability than the cell that drives the target wire.
REFERENCES:
patent: 5563820 (1996-10-01), Wada et al.
patent: 6285573 (2001-09-01), Park
patent: 404073951 (1992-03-01), None
patent: 404170049 (1992-06-01), None
patent: 6-314741 (1994-11-01), None
patent: 08306867 (1996-11-01), None
patent: 9-307061 (1997-11-01), None
patent: 11-40699 (1999-02-01), None
U.S. application No. 09/759,448, Genichi Tanaka, filed Jan. 16, 2001.
Lin Sun James
Mitsubishi Denki & Kabushiki Kaisha
Siek Vuthe
LandOfFree
Shield circuit designing apparatus and shield circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Shield circuit designing apparatus and shield circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shield circuit designing apparatus and shield circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2946183