Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-04-22
2002-02-05
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
Reexamination Certificate
active
06344408
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for improving non-uniformity of chemical mechanical polishing and more particularly to a method that an over coating layer is formed on a surface before the surface is polished. Because polishing rate of the over coating layer is less than the underlying surface, the uniformity of polished surface is enhanced.
2. Description of the Prior Art
Chemical mechanical polishing (CMP) is a standard method in deep submicron fabrication. Although the fabrication of CMP is more complicated than other conventional planarization method such as spin on glass (SOG), but the global planarization of surface that planarized by CMP is excellent than other conventional planarization method. Thus, CMP is widespread used in deep submicron fabrication.
The chemical mechanical polishing is employed to enhance uniformity of a surface, where a plurality of semiconductor structures are located in and on the surface and a coating layer is employed to cover the surface and these semiconductor structures. In addition, possible semiconductor structures comprise gate, electrode of capacitor, isolation layer and metal plug. A typical example of CMP is shown in FIG.
1
A and
FIG. 1B
, where prior metal line
10
is formed over a wafer then metal structure
12
is formed on prior metal line
10
, and a plurality of trenches
14
are inside metal structure
12
. Afterwards, barrier layer
18
and coating layer
16
are formed over metal structure
12
in sequence, where application of barrier layer
18
comprises insulation and enhances adhesion. Obviously, as shown in
FIG. 1A
, because the topography of metal structure
12
is not uniform, the topography of coating layer
16
also is non-uniform. Because the uniformity of CMP is restricted by uniformity of unpolished surface and what structures is underlying the unpolished surface, the polished surface of coating layer
16
still is not prefect uniform and there are dishings above trenches
14
, as shown in FIG.
1
B. Thus, though the global planarization of CMP is excellent than other conventional planarization method, but it is uniformity of CMP still is improvable.
Expect the intrinsic restriction as describe in former discussion, the uniformity of CMP also be decreased by an extrinsic restriction. Because in many recent applications of CMP, details of CMP process are under-researched and not well known, then the fabrication of CMP application is not optimized. In addition, both numbers of main parameters of the CMP application and mechanism of each main parameter is dependent on what material is polished. For example, main parameters are material of pad and rotating rate of pad for SiO
2
wafer, but main parameters is pH value of slurry for tungsten-CMP. Thus, if details of CMP process are not well known then the efficiency of CMP is decreased and uniformity of polished surface is degraded.
According to the previous discussion, uniformity of polished surface is degraded if CMP process is not optimized. Moreover, it is more serious when details of related CMP application are still under-researched and it is impossible to optimize CMP process. For example, Cu-CMP is employed by Cu damascene process to remove residual Cu and form required Cu structure. Nevertheless, both slurry and pad of Cu-CMP are under-researched, so Cu-CMP process is not optimized and then there are dishing and erosions on formed Cu structures, where a typical depth of the dishing is about 1500 angstroms.
For the foregoing reasons, it is important in CMP application that enhances uniformity of polished surface that covers non-uniform structures. Furthermore, it is an urgent problem in many recent CMP applications that how to overcome the non-uniformity which induced by lacking of knowledge about details of CMP process.
SUMMARY OF THE INVENTION
In accordance with the present discussion, a method is provided to improve non-uniformity of CMP. By the method, an over coating layer is formed over a surface before the surface is planarized by CMP, and in following CMP process the polishing rate of the over coating layer is less than polishing rate of the surface, where the ratio of polishing rate is called as selectivity. Because both the topography of the surface and the topography of the over coating layer are uniform, polishing probability is different in different parts of both the over coating layer and the surface. Thus, when the over coating layer on the higher area part of the surface is totally consumed, these are residual over coating layer on the lower area part of the surface. Then over polishing in the lower area part is prevented by residual over coating layer. Before total over coating layer is polished, the polished account of the surface is higher in the high area part and is lower in the lower area part. Thus, uniformity of the surface is enhanced. Moreover, enhancement of uniformity is direct proportional to product of the selectivity and the depth of the over coating layer.
In the first embodiment, the invention is employed to enhance uniformity of surface that planarized by chemical mechanical polishing by an over coating layer. In the embodiment, CMP process is employed to improve uniformity of a surface of a semiconductor wafer, where a plurality of semiconductor structures is formed in and on the surface and a coating layer is formed over the semiconductor wafer and employed to cover these semiconductor structures. Before the surface is polished, an over coating layer is formed over the coating layer where polishing rate of the over coating layer must be less than polishing rate of the coating layer. Afterwards, a chemical mechanical polishing process is employed to planarize the surface of the semiconductor wafer.
In another embodiment of the invention, the invention is employed to enhance uniformity of metal layer that produced by metal damascene process. Provided embodiment comprises following steps: First, a metal structure is formed on a surface of a wafer, where the surface comprises a prior metal lines and a plurality of trenches are formed in the metal structure. Then a metal barrier layer is formed over the surface of the metal structure. Afterwards, a metal layer is formed over the metal barrier layer and fills these trenches. Second, an over coating layer is formed on the metal layer, where the polishing rate of the over coating layer must be less than the polishing rate of the metal layer. Third, a chemical mechanical polishing process is employed to planarize the surface of the wafer until total the over coating layer is removed. By the way, part of the metal layer is removed and non-uniformity of the surface is improved.
In the last embodiment, the invention is employed to enhance uniformity of copper chemical mechanical polishing by an over coat layer. First, a semiconductor structure is formed on a surface of a wafer where a trench is located in the semiconductor structure. Second, a copper barrier layer is formed on surface of the semiconductor structure by chemical vapor deposition. Third, a copper layer is formed over the copper barrier and fills the trench. Afterwards, an over coating layer is formed on the copper layer, where polishing rate of the over coating layer is less than the copper layer. Finally, a chemical mechanical polishing process is employed to planarize surface of the copper layer. Because the polishing probability is different in different part of the surface, it is higher in high area part and is low in lower area part, the uniformity of the polished surface is enhanced.
REFERENCES:
patent: 5618381 (1997-04-01), Doan et al.
Chen Hsueh-Chung
Lur Water
Wu Juan-Yuan
Yang Ming-Sheng
Hoang Quoc
Nelms David
United Microelectronics Corp.
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