Methods of forming DRAM assemblies, transistor devices, and...

Details Methods of forming DRAM assemblies, transistor devices, and... Methods of forming DRAM assemblies, transistor devices, and...

1999-09-02

2002-12-31

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S243000, C438S270000, C438S424000, C438S430000, C438S589000

Reexamination Certificate

active

06500744

ABSTRACT:

TECHNICAL FIELD
The invention pertains to methods of forming openings in substrates. The invention also pertains to methods of forming trenched isolation regions. Additionally, the invention pertains to methods of forming transistor devices, and to methods of forming DRAM assemblies.
BACKGROUND OF THE INVENTION
Numerous devices have been developed which can be formed within trenches in a semiconductive material wafer. Such devices include, for example, isolation regions and transistor gates. A difficulty in forming such devices is to minimize a width (or footprint) of a trench utilized for forming the devices.
Photolithographic processing is commonly utilized to define regions which are to be etched for formation of trenches, with the term “photolithographic processing” understood to refer to processes wherein a photosensitive layer is patterned with a masked beam of light. Difficulties in utilizing photolithographic processing are becoming prevalent with continued efforts to reduce device sizes. Specifically, the minimum feature dimension which can be produced by photolithographic processing is limited. It is desirable, therefore, to develop new methods for forming devices which can reduce a feature size beyond that achievable by photolithographic processing.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a method of forming an opening in a substrate. A first expanse of a first material is formed over the substrate, and such expanse comprises a sidewall edge. A second material is formed alone the sidewall edge, and subsequently a second expanse of the first material is formed over the substrate and separated from the first expanse by the second material. The first and second expanses together define a mask. The second material is removed with an etch selective for the second material relative to the first material to form an opening extending through the mask. The substrate is etched through the opening in the mask to extend the opening into the substrate. In a particular embodiment of the invention, the opening is filled with insulative material to form a trenched isolation region. In another embodiment of the invention, the opening is filled with a conductive material to form a transistor gate.


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T. Hamamoto et al., “NAND-Structured Cell Technologies for Low Cost 256Mb DRAMs”, IEEE (1993), pp. 643-646.

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