Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-10-25
2002-10-01
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S679000, C427S534000
Reexamination Certificate
active
06458700
ABSTRACT:
TECHNICAL FIELD
This invention relates to integrated circuitry fabrication methods of making a conductive electrical connection, to methods of forming a capacitor and an electrical connection thereto, to methods of forming DRAM circuitry, and to integrated circuitry such as DRAM integrated circuitry.
BACKGROUND OF THE INVENTION
As DRAMs increase in memory cell density, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area. One principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors. Yet as feature size continues to become smaller and smaller, development of improved materials for cell dielectrics as well as the cell structure are important. The feature size of 256 Mb DRAMs and beyond will be on the order of 0.25 micron or less, and conventional dielectrics such as SiO
2
and Si
3
N
4
might not be suitable because of small dielectric constants.
Highly integrated memory devices, such as 256 Mbit DRAMs and beyond, are expected to require a very thin dielectric film for the 3-dimensional capacitor of cylindrically stacked or trench structures. To meet this requirement, the capacitor dielectric film thickness will be below 2.5 nm of SiO
2
equivalent thickness. Insulating inorganic metal oxide materials have high dielectric constants and low leakage current which make them attractive as cell dielectric materials for high density DRAMs and non-volatile memories. Most all of these materials incorporate oxygen and are otherwise exposed to oxygen and anneal for densification to produce the desired capacitor dielectric layer.
In many such applications, it will be desirable to utilize conductive metal oxides as the principal material for one or both of the conductive capacitor electrodes. Conductive contact to the outer, or cell, electrode layer in DRAM circuitry is typically made through a contact opening formed within an electrically insulative material. The opening is subsequently filled with one or more conductive materials, such as titanium, titanium nitride and/or tungsten, to form the conductive contact to the cell electrode. Unfortunately, these materials are capable of oxidizing to a non-conducting metal oxide upon effective exposure to the overlying conductive metal oxide. For example, exposure to temperature as low as 200° C. can cause oxygen from the conductive metal oxide to react with one or more of titanium, titanium nitride and tungsten to form an insulative oxide, and effectively block the electrical connection.
Overcoming such problem in DRAM circuitry fabrication was a motivation for the invention, but the invention is in no way so limited.
SUMMARY
The invention comprises integrated circuitry fabrication methods of making a conductive electrical connection, methods of forming a capacitor and an electrical connection thereto, methods of forming DRAM circuitry, integrated circuitry, and DRAM integrated circuitry. In one implementation, an integrated circuitry fabrication method of making a conductive electrical connection includes forming a conductive layer including a conductive metal oxide over a substrate. The conductive layer has an outer surface. At least a portion of the conductive layer outer surface is exposed to reducing conditions effective to reduce at least an outermost portion of the metal oxide of the conductive layer, most preferably by removing oxygen. Conductive material is formed over the reduced outermost portion and in electrical connection therewith.
In one implementation, a method of forming a capacitor and an electrical connection thereto includes forming a pair of capacitor electrodes having a capacitor dielectric layer therebetween over a substrate. At least one of the capacitor electrodes includes a conductive metal oxide. An insulating layer is formed over the capacitor electrodes. A contact opening is formed into the insulating layer over the one capacitor electrode. The one capacitor electrode under the contact opening is exposed to conditions effective to remove at least some of the oxygen of the metal oxide from at least an outermost portion of the one capacitor electrode. Conductive material is formed within the contact opening in electrical connection with the one capacitor electrode.
In one implementation, integrated circuitry includes a conductive metal oxide comprising layer received over a substrate. The conductive metal oxide comprising layer has at least one localized region. At least an outermost portion of the localized region has less oxygen content than a region of the conductive metal oxide comprising layer immediately laterally adjacent the at least one localized region.
Other aspects and implementations are disclosed or contemplated.
REFERENCES:
patent: 6086960 (2000-07-01), Kim et al.
09/360,292 Sujit Sharon et al. Jul. 22, 1999.
Le Dung A
Micro)n Technology, Inc.
Wells St. Johns P.S.
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