System including a data processor, a synchronous dram, a periphe

Details System including a data processor, a synchronous dram, a periphe System including a data processor, a synchronous dram, a periphe

1994-01-21

1995-02-14

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

36518904, 36518905, 36518909, G11C 1300

Patent

active

053901495

ABSTRACT:
A synchronous random access memory is arranged to be responsive directly to a system clock signal for operating synchronously with the associated microprocessor. The synchronous random access memory is further arranged to either write-in or read out data in a synchronous burst operation or synchronous wrap operation in addition to synchronous random access operations. The synchronous random access memory device may be fabricated as a dynamic storage device or as a static storage device.

REFERENCES:
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Triad Semiconductors Inc., Static RAMs have on-chip address and Data Latches for Pipelining, EDN, Dec. 8, 1988, p. 116.
Cole, Bernard C., Motorola's Radical SRAM Design Speeds Systems 40%, Electronics, Jul. 23, 1987, pp. 66-68.
Iqbal, Mohammad Shakaib, Internally Timed RAMs Build Fast Writable Control Stores, Electronic Design, Aug. 25, 1988, pp. 93-96.
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