Device and method for coding and decoding data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S763000

Reexamination Certificate

active

06477677

ABSTRACT:

The present invention concerns in general terms the coding and decoding of digital data, and relates particularly to the use of a single circuit for coding and decoding data, for example in a device for sending and receiving data.
The invention also relates to the transfer of data between a memory and a data coding or decoding circuit.
In the majority of cases of transmission of data between a sending device and a receiving device, it is necessary to code the data before the sender transmits them, and correlatively to decode them after the receiver has received them. The purpose of the coding is for example to minimise transmission errors due to noise corrupting the transmitted data, or to encrypt the transmitted data.
The coding and decoding operations can be performed by a single circuit, which is programmed either in coding mode or in decoding mode. A data coding and decoding device then uses a coding circuit and a decoding circuit which are programmed once and for all.
However, in the case of applications functioning in half-duplex mode, it is clear that the coding circuit and the decoding circuit never operate simultaneously. Since these circuits are relative expensive, a device which has two of these circuits is expensive.
The type of coding envisaged here consists of increasing the total number of data to be transmitted, by adding coding data to the data initially to be transmitted, or useful data.
A coding circuit processes the useful data in blocks in order to code them, one block including for example a few tens of octets. The coding circuit requires as an input blocks of data to be coded separated from each other by padding blocks. The coding circuit replaces the padding blocks with blocks of coding data. The coding circuit produces successive frames each having a block of useful data formed by a certain number of words of useful data, and a block of coding data formed by a certain number of words of coding data.
On reception, the coding data must be separated from the useful data. The coding data are used for decoding the useful data, for example by correcting any transmission errors, or by decrypting the useful data. The latter can then be stored to memory, for example.
The decoding circuit therefore produces successive blocks of useful data.
In addition, more and more devices use a direct access circuit for transferring data between two internal circuits. A direct access circuit allows more rapid transfers than a processor and does not monopolise the processor.
In order to use a direct access circuit as effectively as possible, that is to say to effect rapid data transfers, it is necessary to effect a continuous transfer of a data “stream”. However, as stated above, the coding circuit requires, as an input, blocks of data to be coded separated from each other by padding blocks.
There is therefore incompatibility between transferring the data in continuous streams and supplying useful data in blocks, with interruption between the blocks.
This is because the transmission of successive small blocks of data by means of a direct access circuit eliminates the advantage of the latter, since it would then be necessary to reprogram the direct access circuit for each block transmitted.
In order to transfer data between a memory and a coding circuit as envisaged here, it is therefore not realistic to effect successive transfers of blocks containing the number of words of useful data for each of the frames to be formed.
In order to effect a continuous transfer of a large number of words of useful data between the memory and the coding circuit, it can be envisaged including non-significant words after each block of useful data, prior to transfer. At the time of coding, these non-significant words will be replaced by the coding words. However, this results in storing the non-significant words with the useful data words, and consequently a large amount of memory space is necessary.
Likewise, after decoding, in order to effect a continuous transfer of a large number of data words to the memory, it can be envisaged transmitting the coding words with the useful data words. There again, this results in using a large amount of memory space, by the storage of coding words which then no longer have any function.
Both for coding and decoding, the memory is poorly used, since it contains non-signficant words or coding words, in addition to useful data.
Thus the transfer of data between a memory and a coding or decoding circuit by means of a direct access circuit results in using either the direct access circuit or the memory in a non-optimum fashion.
The present invention aims to remedy the drawbacks of the prior art by providing a device and a method for coding and decoding data which makes it possible to code and decode data in half-duplex mode in a more economical fashion, whilst being just as effective, than in the prior art.
For this purpose, the invention proposes a method of coding and decoding data, the data to be coded and the decoded data being stored in a memory, characterised in that the coding and decoding are performed by a single data coding and decoding means,
and in that it includes the steps of:
initialising the coding and decoding means in coding mode, and controlling the passage of data to be coded from the memory to the coding and decoding means, and
initialising the coding and decoding means in decoding mode, and controlling the input of coded data into the coding and decoding means, and the passage of decoded data from the coding and decoding means to the memory.
Correlatively, the invention concerns a data coding and decoding device, having a memory for storing the data to be coded and the decoded data,
characterised in that it has a single data coding and decoding means and a control means adapted to, selectively:
initialise the coding and decoding means in coding mode, and control the passage of data to be coded from the memory to the coding and decoding means, and
initialise the coding and decoding means in decoding mode, and control the input of coded data into the coding and decoding means, and the passage of decoded data from the coding and decoding means to the memory means.
The invention also concerns a data coding and decoding device, adapted to cooperate with a memory for storing the date to be coded and the decoded data,
characterised in that it has a single data coding and decoding means and a control means adapted to, selectively:
initialise the coding and decoding means in coding mode, and control the passage of data to be coded from the memory to the coding and decoding means, and
initialise the coding and decoding means in decoding mode, and control the input of coded data into the coding and decoding means, and the passage of decoded data from the coding and decoding means to the memory means.
The method and device according to the invention allow a coding and a decoding of data in half-duplex mode which is performed economically since a single coding and decoding component is required.
According to a preferred characteristic of the invention, the method also includes the step of controlling a transfer of data to a data transmission means after the coding of the data. This is because the data coding applies particularly to the transmission of data, for example by radio transmission.
According to another preferred characteristic of the invention, the method includes the step of controlling a transfer of data between a data reception means connected at the input to the coding and decoding means, and the coding and decoding means. This is because the decoding of data applies particularly to the reception of data which have for example been sent by radio transmission.
The control means is advantageously connected at the input and output of the coding and decoding means, so that the data to be coded and the decoded data pass through the control means. Controlling the data transfer is thus performed reliably and economically.
According to other preferred characteristics, the device includes a data transmission means connected at the output of the codi

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