Semiconductor memory device having a self-refresh operation

Details Semiconductor memory device having a self-refresh operation Semiconductor memory device having a self-refresh operation

2001-02-26

2002-06-11

Nelms, David (Department: 2818)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S225700, C365S236000

Reexamination Certificate

active

06404688

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor memory devices, and more particularly, to a semiconductor memory device of a DRAM (Dynamic Random Access Memory) type in which a self-refresh operation is constantly performed within the memory device.
2. Description of the Related Art
Recently, a compact mobile terminal such as a cellular phone has collaborated with the Internet and handled a large amount of data. This has stimulated a large-capacity memory. Nowadays, an SRAM (Static Random Access Memory) is employed in the cellular phones because of its low power consumption. However, the SRAM does not have a high integration density. The larger the SRAM capacity, the more expensive the cost. In contrast, the DRAM is a low-cost, high-capacity memory. The DRAM and SRAM do not have different command systems. This does not allow the SRAM to be simply interchanged with the DRAM. In this case, a major problem arises from a refresh operation of the DRAM. Data stored in memory cells of the DRAM will be lost unless the DRAM is periodically refreshed. The periodic refresh can be implemented by supplying a refresh command to the DRAM from a controller provided outside of the DRAM. However, this would apply a considerable load to the controller. This needs a periodic refresh that is spontaneously performed within the DRAM. Such a periodic refresh is called self-refresh.
Conventionally, the refresh operation is performed at intervals that are set by means of fuses provided within the DRAM. The cycle of self-refresh is selected so that power consumption can be minimized at the time of self-refresh. If the cycle of the self-refresh does not have the optimal value, power will be uselessly consumed. The cycle defined by the fuses is fixed and cannot be changed. The cycle of the self-refresh is no longer changed after the settings of fuses.
A semiconductor memory device directed to overcoming the above drawback has been proposed in Japanese Laid-Open Patent Application No. 8-315569. In this proposal, a mode register is substituted for fuses. Information about the cycle of the self-refresh can be externally written into a timer for use in self-refresh. There is another proposal disclosed in Japanese Laid-Open Patent Application No. 11-345486. According to this proposal, an exclusively used pin is provided to which a control signal for controlling the cycle of the self-refresh is externally applied. The control signal adjusts the cycle of self-refresh defined by the setting of fuses provided in the memory device.
However, Japanese Laid-Open Patent Application No. 8-315569 does not meet a requirement of changing the cycle of the self-refresh in the semiconductor memory device equipped with the fuses. Japanese Laid-Open Patent Application No. 11-345486 meets a requirement of changing the cycle of the self-refresh, but needs an increased chip area for providing the exclusively used pin to which the control signal is applied.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide a semiconductor memory device in which the above disadvantages are eliminated.
A more specific object of the present invention is to provide a semiconductor memory device capable of changing the cycle of self-refresh from the outside of the device without increasing the chip area although the device employs fuses.
The above objects of the present invention are achieved by a semiconductor memory device having a self-refresh operation comprising:
a first circuit generating a first signal that specifies a first self-refresh cycle by a non-volatile circuit element provided in the semiconductor memory device; a second circuit receiving a second signal that specifies a second self-refresh cycle via a terminal that is used in common to another signal; and a third circuit generating a pulse signal having one of the first and second self-refresh cycles, the pulse signal being related to the self-refresh operation.


REFERENCES:
patent: 5243576 (1993-09-01), Ishikawa
patent: 5636171 (1997-06-01), Yoo et al.
patent: 5703823 (1997-12-01), Douse et al.
patent: 6023440 (2000-02-01), Kotani et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device having a self-refresh operation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device having a self-refresh operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having a self-refresh operation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2920676