Method for designating one of a plurality of addressable...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S162000, C711S167000, C709S214000

Reexamination Certificate

active

06470420

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the operation of a network of addressable storage devices which are configured to access a replicated data set. More particularly, this invention relates to reducing the response time of the storage devices to a request to read or write data, while more efficiently utilizing the storage device resources and assuring that coherency is maintained between data set replicated on each of the storage devices.
2. Description of the Prior Art and Related Information
Previous data storage systems have made use of multiple addressable storage devices, hereinafter referred to as “ASD's.” Such ASD's can be hard disk drives, cache memory devices, or other storage elements which permit data to be accessed by referencing an address pointing to a specific data component such as a block of predetermined length. In many such systems, the data stored is replicated or mirrored on a plurality of ASD's. U.S. Pat. No. 5,390,313 to Yanai et al., U.S. Pat. No. 5,463,758 to Ottesen and U.S. Pat. No. 5,819,310 to Vishlitzky et al. describe storage systems utilizing multiple storage devices having mirrored data. These references also describe methods for using the multiple storage devices to reduce the data access time. However, the prior art has been limited in teaching methods of achieving higher performance which scales with the number of storage devices deployed.
In the communications field, it is known to connect intelligent addressable devices, such as computers, to form networks such as switched fabric networks. Switched fabric networks can be configured for example, as hypercubes. The addressable devices serve as the “nodes” of the hypercube. A single node can be considered as a zero dimensional cube, two nodes joined by a line (or “edge”) are a one dimensional cube, four nodes arranged in a square are a two dimensional cube and eight nodes are an ordinary three dimensional cube. Continuing this geometric progression, the first hypercube has 16 nodes and is a four dimensional shape (a “four-cube”) and an N dimensional cube has 2
N
nodes (an“N-cube”).
Switched fabric networks utilize packet switching, a communications paradigm, in which packets (messages or fragments of messages) are individually routed between nodes, with no permanently established communication path. Packets are routed to their destination through the most expedient route (as determined by some routing algorithm). Not all packets travelling between the same two hosts, even those from a single message, will necessarily follow the same route. The destination node reassembles the packets into their appropriate sequence.
In switched fabric networks, commands can be “broadcast” to all members, rather than specific members of a group, or can be “multicast” between a single sender and a multiple specific group of receiving addresses on the network. Packet switching is used to optimize the use of the bandwidth available in a network and to minimize the latency. Although the switched fabric architecture provides an efficient medium for transmitting data, the latency inherent in accessing data from ASD's connected in a fabric may prevent achieving full advantage of the switched fabric medium. There remains a need for an effective way to manage ASD's in a switched fabric environment to provide performance which scales with the number of devices.
SUMMARY OF THE INVENTION
This invention can be regarded as a method for operating a plurality of addressable storage devices (ASD's) that store a replicated data set. The method comprises receiving a multicasted request for the ASD's to supply a subset of the replicated data set which is stored in both a first and second one of the ASD's. The first ASD multicasts a control signal so that the second ASD receives the control signal and refrains from supplying the subset. The first ASD then supplies the subset.
In one aspect of the invention, first and second ASD's have respective first and second response times for supplying the subset. Preferably, the first ASD's response time is less the second ASD's response time.
An exemplary ASD can be a disk drive or a cache memory subsystem.
Alternately, the invention can be regarded as a method for processing a data transfer request by a plurality of ASD's each having a variable response time and being connected to a requestor in a network, wherein the ASD's are configured to access a data set which is replicated in each ASD. The method includes multicasting the data transfer request from the requestor to the ASD's where the data transfer request represents a request to transfer at least a subset of the replicated data set. The method further includes receiving the data transfer request by the ASD's and communicating between the ASD's to designate one of the ASD's for processing of the data transfer request based on its variable response time. As a consequence, the ASD's which are not designated abandon efforts to satisfy the data transfer request. The method further includes processing the data transfer request with the designated ASD, and then sending an acknowledgment to the requestor when the processing is completed.
Preferably the not-designated ASD's monitor write data requests and set an indication to invalidate existing stored data corresponding to the data to be written. Preferred methods include monitoring the data to be written by not-designated ASD's and copying the data as it is written to the designated ASD.
The step of communicating between the ASD's preferably includes calculating a length of time to complete processing the request and posting the length of time to other ASD's.
In a preferred embodiment, the data transfer request is communicated into a switched fabric network comprising ASD nodes.


REFERENCES:
patent: 5390313 (1995-02-01), Yanai et al.
patent: 5463578 (1995-10-01), Gambino et al.
patent: 5819310 (1998-10-01), Vishlitzky et al.
patent: 5832522 (1998-11-01), Blickenstaff et al.
patent: 5892914 (1999-04-01), Pitts

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