Enhanced fuse configurations for low-voltage flash memories

Static information storage and retrieval – Read/write circuit – Having fuse element

Reexamination Certificate

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Details

C365S185330, C365S185090, C365S200000, C365S185050

Reexamination Certificate

active

06426910

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to semiconductor integrated circuits. More particularly, it pertains to fuse configurations that are used in redundancy circuits in low-voltage flash memory devices.
BACKGROUND
Memory devices are integrated circuits in which information may be stored and from which information may be extracted when desired. Each memory device is built from a plurality of memory cells. Each memory cell memorizes a bit of data. Although a bit of data seems insignificant, it may determine whether the stored information is correct, such as an amount in a bank account.
A memory cell may become defective because of imperfect manufacturing practices or degradation over time. Such defects render the memory device inoperative or unreliable. Instead of ridding memory devices with defective memory cells, the semiconductor industry turns to various techniques to salvage these memory devices.
One technique employs redundancy circuits. Redundancy circuits include a number of nondefective memory cells that can replace defective memory cells in memory devices. Redundancy circuits do not physically replace the defective memory cells but logically replace them. Redundancy circuits detect whether defective memory cells exist, configure memory devices to avoid the defective memory cells, and redirect memory accesses from the defective memory cells to the nondefective memory cells.
The act of configuring uses fuse circuits, which include fuses that can be blown to support the act of configuring. Previous generations of fuse circuits are incompatible with the memory devices of today, which use voltage supplies as low as 1.65 volts. Certain previous generations of fuse circuits also tightly integrate fuses and latches. Such integration causes inflexibility that is undesirable.
Thus, what is needed are devices and methods to enhance fuse circuit configurations in low-voltage integrated circuits, such as flash memory devices.
SUMMARY OF THE INVENTION
The above mentioned problems with fuse circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification. Devices and methods are described which accord these benefits.
In one illustrative embodiment, a fuse circuit is discussed. The fuse circuit includes a volatile latch and a nonvolatile fuse that is receptive to a voltage supply of about 1.65 volts. The voltage supply is boosted at a desired time to a predetermined level and for a predetermined duration so that the nonvolatile fuse transfers its data to the volatile latch.
In another illustrative embodiment, a fuse circuit is discussed. The fuse circuit includes an input stage and a nonvolatile fuse having a first, a second, and a third connection. The first connection receives an enabling signal. The enabling signal can be boosted so that the nonvolatile fuse selective transfers its data. The input stage is receptive to an enabling signal.
In another illustrative embodiment, a fuse circuit is discussed. The fuse circuit includes an input stage that presents an inverted enabling signal, a boosting stage receptive to a boosting signal, and a nonvolatile fuse. The nonvolatile fuse has a first, a second, and a third connection. The first connection receives the inverted enabling signal. The inverted enabling signal is boosted by the boosting stage so that the nonvolatile fuse selectively transfers its data.
In another illustrative embodiment, a method is discussed for enhancing a fuse circuit in a low-voltage integrated circuit (IC). The method includes presenting by an input stage an inverted enabling signal, boosting by a boosting stage the inverted enabling signal, and transferring selectively by a nonvolatile fuse. The nonvolatile fuse has a first, a second, and a third connection. The first connection receives the inverted enabling signal that is boosted so that the nonvolatile fuse selectively transfers its data.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.


REFERENCES:
patent: 5949710 (1999-09-01), Pass et al.
patent: 6122209 (2000-09-01), Pass et al.
patent: 6163490 (2000-12-01), Shaffer et al.
patent: 6259271 (2001-07-01), Couts-Martin et al.

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