Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-05-24
2002-08-27
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
06441420
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device comprising a capacitor having a capacitor insulating film composed of an insulating metal oxide film such as a ferroelectric film or a high-dielectric-constant film and to a method of fabricating the same.
With the advancement of digital technology in recent years, there have been increasing tendencies to process or store a larger amount of data. Under such circumstances, electronic equipment has been more sophisticated than ever, which has rapidly increased the integration density of a semiconductor integrated circuit used in the electronic equipment and promoted the miniaturization a semiconductor element used therein.
To increase the integration density of a dynamic RAM composing the semiconductor integrated circuit, research and development has been conducted widely on a technique using a ferroelectric film or a high-dielectric-constant film as a capacitor insulating film in place of a silicon oxide film or a silicon nitride film that has been used conventionally.
To implement an actually usable nonvolatile RAM which operates at a low voltage and permits a high-speed write or read operation performed thereto, vigorous research and development has been conducted on a ferroelectric film having the property of spontaneous polarization.
The most significant challenge to the implementation of a semiconductor device comprising a capacitor having a capacitor insulating film made of an insulating metal oxide such as a ferroelectric film or a high-dielectric-constant film is the development of a process which allows the integration of the capacitor into a CMOS integrated circuit without degrading the properties of the capacitor. In particular, the most important point is to prevent the degradation of the properties of the capacitor due to the reduction of an insulating metal oxide composing the capacitor insulating film by hydrogen.
Referring now to
FIG. 8
, a conventional semiconductor device comprising a capacitor insulating film made of an insulating metal oxide and a fabrication method therefor will be described.
As shown in
FIG. 8
, a device isolation region
11
is formed in a surface portion of a semiconductor substrate
10
, followed by a gate electrode
13
formed on the semiconductor substrate
10
with a gate insulating film
12
interposed therebetween. Then, impurity ions at a low concentration are implanted by using the gate electrode
13
as a mask. Subsequently, impurity ions at a high concentration are implanted by using the gate electrode
13
and the gate protective insulating film
14
as a mask, whereby impurity diffusion layers
15
each having an LDD structure and serving as a source or drain region of the field-effect transistor is formed.
Next, a first protective insulating film
16
is deposited over the entire surface of the semiconductor substrate
10
. Then, a first contact hole is formed in the first protective insulating film
16
and a conductive film is filled in the first contact hole, whereby a first contact plug
17
connected to one of the impurity diffusion layers
15
which serves as the source or drain region of the first field-effect transistor forming a memory cell is formed.
Next, a capacitor lower electrode
18
composed of a multilayer film consisting of a titanium film, a titanium nitride film, an iridium oxide film, and a platinum film and connected to the first contact plug
17
and a capacitor insulating film
19
composed of an insulating metal oxide are formed on the first protective insulating film
16
. Thereafter, an insulating film
20
is formed on the first protective insulating film
16
to be located between the capacitor lower electrode
18
and the capacitor insulating film
19
.
Next, a capacitor upper electrode
21
composed of a multilayer film consisting of a platinum film and a titanium film is formed over the plurality of .capacitor insulating films
19
and the insulating film
20
to have a peripheral portion extending over the first protective insulating film
16
. The foregoing capacitor lower electrode
18
, the capacitor insulating film
19
, and the capacitor upper electrode
21
constitute a capacitor for storing data. The capacitor and the first field-effect transistor constitute a memory cell. A plurality of memory cells constitute a memory cell array.
Next, a hydrogen barrier film
22
composed of a silicon nitride film or a boron nitride film is formed to cover the capacitor upper electrode
21
. Then, a second protective insulating film
23
is deposited entirely over the hydrogen barrier film
22
and the first protective insulating film
16
. The hydrogen barrier layer
22
has the function of preventing a hydrogen atom from being diffused in the capacitor upper electrode
21
, reaching the capacitor insulating film
19
, and reducing the insulating metal oxide composing the capacitor insulating film
19
.
Next, a second contact hole
27
(see FIG.
9
(
a
)) is formed in the second protective insulating film
23
and then a third contact hole
28
(see FIG.
9
(
b
)) is formed in the first and second protective insulating films
16
and
23
. Subsequently, a conductive film is deposited on the second protective insulating film
23
such that the second and third contact holes
27
and
28
are filled therewith and then patterned, thereby forming a second contact plug
24
connected to the capacitor upper electrode
21
, a third contact plug
25
connected to the impurity diffusion layer
15
of the second field-effect transistor forming a sense amp, and a wiring layer
26
for providing a connection between the second and third contact plugs
24
and
25
.
In a semiconductor memory comprising a capacitor for storing data which has the capacitor insulating film
19
made of an insulating metal oxide, a voltage is applied to the capacitor lower electrode
18
for every one bit so that the capacitor lower electrode
18
is connected to the impurity diffusion layer
15
of the first field-effect transistor via the first contact plug
17
. On the other hand, since a voltage is applied to the capacitor upper electrode
21
for every plural bits, the capacitor upper electrode
21
is connected to the impurity diffusion layer
15
of the second field-effect transistor forming a sense amp via the second contact plug
24
, the wiring layer
26
, and the third contact plug
25
.
In the process of inspecting the properties of the capacitor of the semiconductor device obtained by the method described above, the present inventors noticed that the insulating metal oxide composing the capacitor insulating film
19
was reduced irrespective of the hydrogen barrier film
22
provided on the capacitor upper electrode
21
with the view to preventing the reduction of the insulating metal oxide and the properties of the capacitor were degraded thereby.
As a result of making a wide variety of examinations on the cause of the reduction of the insulating metal oxide, the present inventors found that the insulating metal oxide was reduced in accordance with the following mechanism. A description will be given to the mechanism whereby the insulating metal oxide film is reduced irrespective of the hydrogen barrier film
22
provided on the capacitor upper electrode
21
.
In the step of forming the second contact hole
27
in the second protective insulating film
23
by using the first resist pattern
29
and removing the first resist pattern
29
by using an oxygen plasma, as shown in FIG.
9
(
a
), and in the step of forming the third contact hole
28
in the first and second protective insulating films
16
and
23
by using the second resist pattern
30
and removing the second resist pattern
30
by using an oxygen plasma, as shown in FIG.
9
(
b
), the capacitor upper electrode
21
is exposed in the second contact hole
27
via the opening formed in the hydrogen barrier film
22
, as shown in FIG.
10
(
a
). Although FIG.
10
(
a
) shows the state in which the second resist pattern
30
is formed on the second protective insulating fil
Nagano Yoshihisa
Uemoto Yasuhiro
Andújar Leonardo
Flynn Nathan J.
Matsushita Electronics Corporation
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