Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2000-12-08
2002-09-03
Sherry, Michael (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S1540PB
Reexamination Certificate
active
06445204
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to probing digital signals and more specifically to probing digital signals within Printed Circuit Boards (PCBs).
BACKGROUND OF THE INVENTION
PCBs comprise a number of microelectronic components that are interconnected in order to perform a particular function or set of functions. Examples of components that could be integrated within a PCB include memory devices, Application Specific Integrated Circuits a(ASICs) and processing devices such as Digital Signal Processors (DSs). The components within a PCB communicate with each other via signal traces from a plurality of drivers to a plurality of receivers. As defined herein below, a driver is an apparatus which outputs a signal while a receiver is an apparatus that receives a signal. It should be understood that normally a microelectronic component within a PCB would comprise one or more drivers along with one or more receivers.
One critical aspect of a PCB design procedure is the testing of the functionality and connectivity of the various signals being transmitted from one microelectronic component to another. The testing of individual signals within the PCB can allow the designer to ensure that the components are operating properly and that all interconnections between specific drivers and receivers are correct. Further, in the case that components are not operating properly, the testing of the signals within the PCB can allow a designer to isolate the problems.
One technique for testing the signals within a PCB, as illustrated in
FIG. 1A
, is the use of internal testing circuitry within the components. Within
FIG. 1A
, a first component
30
comprises functional mode and test mode circuitry
32
,
34
that are each coupled to a driver
36
. The driver
36
is coupled, via a signal trace
38
to a second component
40
that comprises a receiver
42
coupled to the signal trace
38
and detector circuitry
44
coupled to the receiver
42
. In this case, the first component
30
can operate either in functional mode with functional mode circuitry
32
or in test mode with test mode circuitry
34
, the component
30
selecting between the two modes with the use of a test signal that can be dictated by a test engineer. If operating in test mode, the driver
36
outputs a test sequence as dictated by the test mode circuitry
34
which is received at the receiver
42
and monitored with the use of the detector circuitry
44
. The test mode circuitry could include such testing procedures as Design For Test (DFT) and Built In Self Test (BIST).
One problem with using internal testing circuitry within the components to test the operation of the PCB is that it is relatively complicated for the test engineer to modify the test software and/or the test parameters within the test mode circuitry
34
. Further, this test mode circuitry
34
requires considerable silicon space which increases the costs of the components and hence the overall PCB. Yet further, since the test mode circuitry
34
is distinct from the functional mode circuitry
32
, it is not possible for the test engineer to test the components within operation using this technique.
Another technique for testing the signals within a PCB, as illustrated in
FIG. 1B
, is the use of probing with a test apparatus. In this case, a driver
50
within a first component
52
is coupled, via a signal trace
54
, to a receiver
56
within a second component
58
, the signal trace
54
further being probed relatively close to the receiver
56
by a test apparatus
60
. With the use of probes on the signal trace
54
, the test apparatus
60
receives a version of the signal being transmitted on the signal trace
54
, thus allowing the designer to monitor the signal during the functional mode of operation. Further, this technique does not require any circuitry modifications within the actual components.
Unfortunately, there are a number of problems with this technique for testing the signals within a PCB as depicted in FIG.
1
B. For one, the signal trace
54
behaves as a transmission line and so when a high speed signal traversing the signal trace
54
is probed with a low capacitance probe from the test apparatus
60
, the probe itself is equivalent to a stub which can cause severe signal integrity problems, such as reflections, on the signal trace
54
. Further, the test apparatus
60
being coupled to the signal trace
54
can result in a significant additional load being added to the signal trace
54
. These problems may result in alterations of the signal traversing the signal trace
54
, thus degrading the signal during testing and not providing accurate results of the signal during normal operating parameters. These problems increase in importance as the signal on the signal trace
54
increases in speed.
Yet further, the probing of signal traces within a PCB are becoming increasingly difficult, if not impossible. The width of a typical signal trace is decreasing while the distance between signal traces is also decreasing, resulting in an increasingly dense array of signal traces within the PCB that is difficult to probe with currently available couplers. An example of a typical dense array of signal traces is illustrated in
FIG. 2
between first and second components
70
,
72
. In this example, the signal traces are 5 mil (a mil being equal to {fraction (1/1000)} of an inch) in width while the distance between adjacent signal traces is approximately 5 mil. Using currently available couplers, the test apparatus
60
would not be able to probe the signal traces.
Another difficulty with the probing of signal traces within current PCB designs is the plurality of layers that comprise a PCB. These layers typically include one or more signalling layers as well as a plurality ground layers that surround the signalling layers. This type of design for the PCB can prevent the test engineer from accessing any of the signals that are routed on signal traces inaccessible to the top or bottom of the PCB. To demonstrate this problem,
FIGS. 3A and 3B
illustrate a sample layer structure for a portion of a PCB (no components illustrated). Within
FIG. 3A
, the PCB comprises first and second signalling layers
80
,
82
and first and second ground layers
84
,
86
. The first ground layer
84
in this example is on top of the first signalling layer
80
while the second ground layer
86
is beneath the second signalling layer
82
.
FIG. 3B
illustrates the signalling layers
80
,
82
of
FIG. 3A
with the layers separated for easier viewing of the signal traces. In this case, it can be seen that none of the signals traversing signal traces within signalling layers
80
,
82
are accessible at the top or bottom layer of the PCB, these layers being the only layers to which a test engineer can attach a coupler for the test apparatus
60
.
To overcome the above described problem of signal traces that are too narrow to attach probes, it has been well-known to attach small resistors to signal traces so that the test apparatus couplers are able to tap onto the resistors and hence the signal traces. Unfortunately, this solution does not overcome any of the other problems discussed above with reference to probing the signal traces with a test apparatus. For instance, the use of small resistors does not overcome the problem of degrading the signal within the signal trace or the inaccessibility of some signal traces for the test engineer. Additionally, this solution is not practical in high density databus since it would nor be possible to implement a resistor for each of the signal traces.
Hence, there is a need for a new technique for testing signals traversing signal traces of a PCB. Preferably, this technique would not significantly deteriorate the signal traversing the signal traces and would be able to be implemented within dense arrays of signal traces.
SUMMARY OF THE INVENTION
The present invention is directed to an apparatus and method for probing digital signals within a PCB. In the present invention, a sensor apparatus is implemented adj
He Jane J.
Zhao Liguo
Millard Allah P.
Nguyen Jimmy
Nortel Networks Limited
Sherry Michael
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