Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-10-04
2002-09-17
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S132000, C438S612000, C438S654000
Reexamination Certificate
active
06451681
ABSTRACT:
FIELD OF THE INVENTION
This invention relates in general to semiconductor devices and their method of formation, and more particularly to semiconductor devices and methods for forming semiconductor devices having copper-containing interconnects.
BACKGROUND OF THE INVENTION
Copper interconnects are becoming increasingly common as semiconductor dimensions decrease and integrated circuit (IC) performance requirements increase. Copper's advantages over conventional interconnect materials include increased conductivity and improved resistance to electromigration. However, the integration of copper is presenting a variety of challenges for semiconductor manufacturers.
One specific area being challenged includes the use of copper at the uppermost interconnect level to form bond pads. When copper is used to form bond pads, problems can be encountered with chemical or metallurgical attack of the copper. This can occur as a result of the copper bond pad being exposed to an external environment or as a result of materials compatibility issues between the copper bond pad and subsequently formed conductive bumps or wirebonds. All of which can affect the quality and reliability of the integrated circuit. Conventional pad limiting metals (PLMs), which are typically formed over aluminum bond pads to reduce materials interaction problems between bumps and bond pads have largely been ineffective at preventing such problems with copper.
One prior art method attempting to minimize copper's materials interactions with subsequently formed PLMs forms a conductive tantalum nitride film between the PLM and the bond pad. However, this prior art method is typically only used with PLMs that are formed using physical vapor deposition (PVD) methods, such as evaporation or sputtering. Other less costly PLM processes, such as electroplating and electroless plating may be incompatible with the prior art because plating films onto a tantalum nitride surface is not readily accomplished. In addition, wirebonding is not readily adaptable for use with the prior art because the physical properties (i.e. brittleness) of the tantalum nitride film can be problematic. If the stress exerted by the wirebonding operation on the tantalum nitride film is too great, the tantalum nitride film can crack or fracture, thereby exposing portions of the copper bond pad to external environmental conditions. Therefore, the prior art has been limited in its ability to develop a copper bond pad integration scheme that is applicable to a variety of bumping and wirebonding applications.
REFERENCES:
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patent: 5795819 (1998-08-01), Motsiff et al.
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patent: 6133136 (2000-10-01), Edelstein et al.
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Lytle Craig P.
Motorola Inc.
Rodriguez Robert A.
Smith Matthew
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