Semiconductor memory cell having information storage transistor

Details Semiconductor memory cell having information storage transistor Semiconductor memory cell having information storage transistor

1993-12-10

1995-06-27

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 67, 257 69, 257365, 257369, 257401, H01L 2702, H01L 2701, H01L 2900

Patent

active

054282381

ABSTRACT:
A semiconductor memory cell, or a semiconductor memory cell for ASICs, of the structure is provided which ensures stable transistor operation, which does not require a large-capacitance capacitor as required in conventional DRAMs, which ensures reliable reading and writing of information, that permits short-channel design, and that allows the cell area to be reduced. The semiconductor memory cell includes: an information storage transistor TR.sub.1 comprising a semiconductor channel layer Ch.sub.1, first and second conductive gates G.sub.1, G.sub.2, and first and second conductive layers L.sub.1, L.sub.2 ; and a switching transistor TR.sub.2 comprising a semiconductor channel forming region Ch.sub.2, a third conductive gate G.sub.3, and third and fourth conductive layers L.sub.3, L.sub.4, wherein the fourth conductive layer L.sub.4 is connected to the second conductive gate G.sub.2, the first conductive gate G.sub.1 and the third conductive gate G.sub.3 are connected to a first memory-cell-selection line, the first conductive layer L.sub.l and the third conductive layer L.sub.3 are connected to a second memory-cell-selection line, the second conductive layer L.sub. 2 is connected to a fixed potential, and the semiconductor channel forming region Ch.sub.2 is connected to a read/write selection line.

REFERENCES:
patent: 4669062 (1987-05-01), Nakano
patent: 4771323 (1988-09-01), Sasaki
patent: 5241193 (1993-08-01), Pfiester et al.

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