Semiconductor memory device including improved connection struct

Details Semiconductor memory device including improved connection struct Semiconductor memory device including improved connection struct

1994-09-06

1995-06-27

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257306, 257385, H01L 2968

Patent

active

054282357

ABSTRACT:
A memory cell of a DRAM comprises one MOS transistor and one capacitor. The MOS transistor includes a pair of source/drain regions and a gate electrode formed on the channel region. A bit line is formed so as to be connected to the source/drain region. A conductive layer is formed so as to be connected to the source/drain region. The gate electrode includes a first part formed on the channel region with an oxide film interposed
and second and third parts extending from the first part, respectively, and formed on the bit line and the conductive layer with an interlayer oxide film interposed. The capacitor includes a lower electrode formed so as to be connected to the conductive layer and an upper electrode formed so as to be opposed to the surface of the lower electrode with a dielectric film interposed. The upper electrode is placed above the bit line. A word line is placed above the upper electrode and connected to the gate electrode. It is possible to provide a field effect transistor in which increase in speed can be realized and to provide a semiconductor memory device in which capacitance of the capacitor can be sufficiently secured in case of making miniaturization of the memory cell. It is also possible to prevent decrease in reliability caused by disconnection of the bit line.

REFERENCES:
patent: 4636834 (1987-01-01), Shepard
patent: 4891327 (1990-01-01), Okumura
patent: 4922312 (1990-05-01), Coleman et al.
patent: 4926223 (1990-05-01), Bergemont
patent: 4942448 (1990-07-01), Tsukamoto et al.
patent: 5005072 (1991-04-01), Gonzalez
patent: 5045901 (1991-09-01), Komori et al.
patent: 5101251 (1992-03-01), Wakamiya et al.
patent: 5144393 (1992-09-01), Yamaguchi et al.
patent: 5166763 (1992-11-01), Wada et al.
patent: 5177575 (1993-01-01), Ikeda
patent: 5347151 (1994-09-01), Shimizu et al.
Geffken et al., "Process for High-Capacitance Single-Device Memory Cell," IBM Technical Disclosure Bulletin, vol. 21, No. 6, Nov. 1978, pp. 2257-2259.

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