Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-12-04
2002-08-27
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S443000, C257S463000
Reexamination Certificate
active
06441411
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state image sensor for obtaining a two-dimensional image using a photoelectric conversion effect.
Prior art will be described with reference to the drawings.
FIG. 1 is an example of the circuit diagram of a solid-state image element called “an amplifying MOS sensor”.
In FIG. 1, unit cells 3×3 consisting of amplifying transistors
2
-
1
-
1
,
2
-
1
-
2
, . . . ,
2
-
3
-
3
for reading signals of photodiodes
1
-
1
-
1
,
1
-
1
-
2
, . . . ,
1
-3-3, vertical select transistors
3
-
1
-
1
,
3
-
1
-
2
, . . . ,
3
-
3
-
3
for selecting lines for reading signals and reset transistors
4
-
1
-
1
,
4
-
1
-
2
, . . . ,
4
-
3
-
3
for resetting signal charges are arranged two-dimensionally.
It is noted that more unit cells are arranged in the actual device. Horizontal address lines
6
-
1
, . . . ,
6
-
3
connected to a vertical shift register
5
in the horizontal direction are connected to gates of vertical select transistors
3
-
1
-
1
,
3
-
1
-
2
, . . . ,
3
-
3
-
3
, respectively, to determine a line for reading a signal. Reset lines
7
-
1
, . . . ,
7
-
3
are connected to gates of reset transistors
4
-
1
-
1
,
4
-
1
-
2
, . . . ,
4
-
3
-
3
, respectively. Sources of the amplifying transistors
2
-
1
-
1
,
2
-
1
-
2
, . . . ,
2
-
3
-
3
are connected to vertical signal lines
8
-
1
, . . . ,
8
-
3
, respectively and load transistors
9
-
1
, . . . ,
9
-
3
are provided on one ends of the sources thereof, respectively. Other ends of the vertical signal lines
8
-
1
, . . . ,
8
-
3
are connected to a horizontal signal line
11
through horizontal select transistors
19
-
1
, . . . ,
19
-
3
selected by a select pulse supplied from a horizontal shift register
10
, respectively.
FIG. 2
is an example of the sectional structure of a prior art photodiode.
In
FIG. 2
, a reference numeral
20
denotes a P-type semiconductor substrate having uniform impurity concentration (about 1×10
15
cm
−3
), a reference numeral
21
denotes a P-well formed by injecting ions of P-type impurities such as boron (B) (with a concentration of about 1×10
17
cm
−3
), a reference numeral
22
denotes an N-type region formed by injecting ions of N-type impurities such as phosphorous (P) and reference numeral
23
denotes a depletion region at a PN junction.
In the structure shown in
FIG. 2
, the concentration of the P-type semiconductor substrate
20
is low (i.e., high resistance) and the concentration of the P-well
21
is higher than that of the P-type semiconductor substrate
20
. With such a structure, diffusion current from the P-type semiconductor substrate
20
is high and a large amount of current is generated in the depletion region
23
since crystal defects are introduced into the P-well
21
as a result of ion implantation. This causes a problem that diode dark current which is the sum of the diffusion current and the generation current is high. The prior art structure also has a problem that, due to the above reason, photo-sensitivity is low and that the phenomenon of the leakage of signal charges into adjacent photodiodes (color crosstalk) increases.
The amplifying MOS image sensor shown in
FIG. 1
which has amplifying transistors (
2
-
1
-
1
, . . . ,
2
-
3
-
3
) within a unit pixel, has characteristically high sensitivity. On the other hand, it has a disadvantage in that non-uniform gate threshold voltages appear as fixed pattern noise. To get rid of that disadvantage, there is known a method of providing noise cancelers
18
-
1
, . . . ,
18
-
3
on ends of vertical signal lines, respectively.
FIG. 3
shows a circuit diagram wherein the noise cancelers
18
-
1
, . . . ,
18
-
3
are provided.
FIG. 4
shows a specific example of the noise canceler. The noise canceler
18
mainly comprises, for example, a clamp capacitance C
1
, a clamp transistor Tr
1
for resetting a node connected to the clamp capacitance C
1
, a sample hold capacitance C
2
, a sample hold transistor Tr
2
for reading a signal from the node connected to the clamp capacitance C
1
. The differential signal between a dark period and a bright period (light incidence period) is outputted to the vertical signal line
11
by the nose canceler. The noise cancel operation of the noise canceler is conducted for a horizontal blanking period or a short period of time such as 10.9 microseconds in a NTSC system and 3.77 microseconds in a High-Vision system. This requires therefore the transistors and capacitance which constitute the noise canceler
18
to have high-speed operation performance.
If a transistor is formed within the P-well shown in
FIG. 2
, the response speed of the transistor is determined by the product of the resistance of the P-well and the capacitance of the depletion layer of the source-drain region of the transistor due to the high resistance of the substrate. This is because current is supplied from a well contact formed on the P-well to the source-drain region in response to a variation in the potential of the transistor. In this case, the P-well may well have quite high concentration (or low resistance) to fasten the response speed. If so, however, it is difficult to control threshold voltage by ion implantation into the channel region of the transistor. The clamp capacitance C
1
and the sample hold capacitance C
2
shown in
FIG. 4
are formed on an insulating film formed on the semiconductor substrate. The capacitance of the insulating film is, therefore, added to the capacitance C
1
and C
2
in series or in parallel. The response speed of capacitance of the insulating film is determined by the product of the P-well resistance and capacitance. For the same reason of the above-stated transistor, it is difficult to fasten the response speed.
Therefore, it is difficult to realize the high-speed operation of the transistor and the capacity which composes a noise canceler as far as it used the conventional wafer section structure shown in FIG.
2
.
As described above, the prior art MOS-type solid-state image sensor has disadvantages in that dark current at the photoelectric conversion portion is high and that component noise during a dark period is large. It also has disadvantages of low sensitivity, color crosstalk and/or high degree of blooming. “Blooming” here is a phenomenon that signal charges are poured into adjacent pixels if intensifier light is incident. Moreover, the prior art MOS-type solid-state image sensor has a disadvantage in that it is difficult to realize the high-speed operation of the transistors which are the constituents of the noise canceler.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to realize lower dark current (less dark time noise) at the photoelectric conversion portion, higher sensitivity, less color crosstalk and less blooming, and to provide a solid-state image sensor capable of realizing the high-speed operation of noise cancelers.
The present invention has taken the following measures to attain the above object.
A solid-state image sensor according to the present invention is characterized by comprising: a semiconductor substrate; a photoelectric conversion portion formed above the semiconductor substrate; and noise cancelers each formed, adjacent to the photoelectric conversion portion, on the semiconductor substrate through an insulating film, for removing noise of a signal read from the photoelectric conversion portion, wherein the semiconductor substrate has a conductive type opposite to a conductive type of a charge of the signal, and has a first region where concentration of impurities for determining the conductive type is high and a second region where concentration of the impurities on the first region is low.
Other solid-state image sensors according to the present invention is characterized by comprising a semiconductor substrate; a photoelectric conversion portion formed above the semiconductor substrate; a third region formed above the photoelectric conversion portion, having a same conductive type as that of a fir
Ihara Hisanori
Inoue Ikuko
Nozaki Hidetoshi
Yamaguchi Tetsuya
Yamashita Hirofumi
Kabushiki Kaisha Toshiba
Munson Gene M.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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