Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-06
2002-08-20
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S653000, C438S654000
Reexamination Certificate
active
06436826
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
A method of forming a metal wiring in a semiconductor device is disclosed. More particularly, the present invention relates to a method of forming a metal wiring in a semiconductor device by which a chemical enhancer layer is formed and copper filled in the damascene pattern by means of selective deposition method using a copper precursor to form a copper wiring.
2. Description of the Prior Art
As the size of a contact is reduced and the aspect ratio is increased for rapid high performance of next-generation semiconductor devices, a metal wiring using aluminum has a problem in that the EM characteristic in which the lifetime of the metal wiring is shortened due to high current density. In order to overcome this problem, a study has been made on a wiring material having low resistance. Recently, wiring material using copper (Cu) has been studied. Also, the commercialization of electroplating method considering cost and deposition speed has been studied. As the electroplating method, however, has a limitation in filling in case of ultra-fine structure, interest in a copper wiring filling using a CVD method has been generated.
The CVD method has a low efficiency due to a low deposition speed and cost, when compared with a wiring filling by means of electroplating method, but there has an effort to overcome this problem by introducing a new process method. One of these methods is a copper wiring filling using chemically enhanced CVD method (CECVD). The CECVD method is a new process method that overcomes the problem of a low deposition speed and an incomplete coverage. This CECVD method, however, still has the problems of uniformly spraying a chemical enhancer and an inability to distribute the chemical enhancer into a desired position for a selective copper filling process.
SUMMARY OF THE DISCLOSURE
A method of forming a metal wiring in a semiconductor device is disclosed that is capable of performing a selective deposition process of copper using a copper precursor and thus easily forming a copper wiring in an ultra-fine texture, by performing a chemical enhancer accelerating deposition of copper and then performing a plasma process or a radical plasma process to remain the chemical enhancer layer only at the bottom of the damascene pattern.
A disclosed method comprises: providing a substrate in which an insulating film having a damascene pattern is formed; forming a diffusion prevention film on said insulating film; forming a chemical enhancer layer on said diffusion prevention film; performing a plasma process so that said chemical enhancer layer can be remained at the bottom of said damascene pattern; forming a copper layer by means of chemical vapor deposition method; and performing a hydrogen reduction annealing and a chemical mechanical polishing process to form a copper metal wiring.
REFERENCES:
patent: 6010962 (2000-01-01), Liu et al.
patent: 6184138 (2001-02-01), Ho et al.
patent: 6271136 (2001-08-01), Shue et al.
patent: 6342447 (2002-01-01), Hoshino
patent: 0954027 (1999-03-01), None
Dang Trung
Hynix / Semiconductor Inc.
Marshall Gerstein & Borun
LandOfFree
Method of forming a metal wiring in a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming a metal wiring in a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a metal wiring in a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2886665