Microcontroller with security logic circuit which prevents readi

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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Details

395186, 395490, G06F 1214

Patent

active

057377600

ABSTRACT:
A microcontroller (20) provides security for internal instructions and data while allowing instruction fetches to external, off-chip memory connected to an expansion bus (30). A central processing unit (CPU) (21) provides a load instruction register signal to indicate when an access is an instruction fetch. When the load instruction register signal is active while the address is within the range of an on-chip nonvolatile memory (25), a security logic circuit (40) is reset to a first state. In this first state, the security logic circuit (40) also allows non-instruction fetches from the nonvolatile memory (25). However when the load instruction register signal is active while the address is not within the range of the nonvolatile memory (25), the security logic circuit (40) is set to a second state. While in this second state, the security logic circuit (40) disables attempted accesses to the nonvolatile memory (25). The security feature is selectively enabled or disabled as determined by a configuration register (23).

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