Programmable logic device macrocell with improved logic...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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C326S038000, C326S041000

Reexamination Certificate

active

06366119

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to programmable logic integrated circuit devices, and more particularly to improved logic macrocells for such devices.
Pedersen U.S. Pat. No. 5,598,108 (hereby incorporated by reference herein) shows a macrocell for programmable logic devices which can form the sum of five product terms and output that sum, either directly or through a register. If a wider fan-in function is needed, the sum formed by one macrocell can be “borrowed” by a neighboring macrocell for combination (i.e., summation) with the five-product-term sum formed by the neighboring macrocell. When the product terms of a macrocell are thus borrowed by a neighboring macrocell, the other resources (e.g., the register) of the first macrocell become unusable. The potential waste of resources is even greater if less than all of the first macrocell's product term resources need to be borrowed.
It is known to make it possible for a macrocell to output one of its product terms (either registered or unregistered) if that product term is not needed for borrowing, even though other product terms of the macrocell are being borrowed. (See, for example,
MACH
3
and
4
Family Data Book,
1993, Advanced Micro Devices, Inc., Sunnyvale, Calif.) However, no complex sum of products function can be implemented by a macrocell from which any of the product terms need to be borrowed.
In view of the foregoing, it is an object of this invention to increase the flexibility with which product terms of a macrocell can be borrowed by another macrocell or (if not borrowed) put to use in the macrocell of which they are nominally a part.
It is also known to feed back to the AND array of a programmable logic device a signal produced by a macrocell. This enables a macrocell to be used to implement a function that is needed by other macrocells to implement more complex functions. However, the ability to feed back only one signal produced by a macrocell may mean that other resources of the macrocell are wasted.
It is therefore another object of this invention to reduce or eliminate possible waste of macrocell resources due to macrocell architectures in which only one signal produced by a macrocell can be fed back to the AND array of the associated programmable logic device.
SUMMARY OF THE INVENTION
These and other objects of the invention are accomplished in accordance with the principles of the invention by providing macrocells in which different numbers of the product terms can be borrowed by a neighboring macrocell, and the product terms that are not thus borrowed can continue to be put to full use in the macrocell that nominally includes them. For example if a macrocell nominally includes five product terms, the number of borrowed product terms may be zero, two, three, or five. If zero product terms are borrowed, then the macrocell may sum all five of its product terms and output that sum, either directly or through the register of that macrocell. If two product terms are borrowed, then the remaining three may be summed and output (directly or through the register) by the macrocell. If three product terms are borrowed, the remaining two may be summed and output (directly or through the register) by the macrocell. In this way each macrocell can continue to implement sum of products functions even when some of its product terms are being borrowed.
In accordance with another aspect of the invention, either the combinatorial (i.e., sum of products) signal or the registered signal produced by a macrocell can be fed back to the AND array of the associated programmable logic device. A registered or unregistered signal produced by the macrocell can be the output signal of the macrocell. This provides feedback flexibility concurrent with usability (to provide another macrocell output) of macrocell resources that may not be involved in producing the feedback signal.
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description of the preferred embodiments.


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Plus Logic FPGA2020 data sheet, Plus Logic, Inc., date unknown, pp. 1-7.

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