System management mode circuits, systems and methods

Details System management mode circuits, systems and methods System management mode circuits, systems and methods

1995-06-07

2002-07-16

Ray, Gopal C. (Department: 2181)

Electrical computers and digital data processing systems: input/

Interrupt processing

Multimode interrupt processing

C710S262000, C710S263000, C710S266000, C710S120000

Reexamination Certificate

active

06421754

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
The following simultaneously filed, coassigned patent applications are hereby incorporated herein by reference:
SERIAL NO.
FILING DATE
TI CASE NO.
08/363,198
12-22-94
TI-18329
08/363,109
12-22-94
TI-18533
08/363,673
12-22-94
TI-18536
08/363,098
12-22-94
TI-18538
08/362,669
12-22-94
TI-18540
08/362,325
12-22-94
TI-18541
08/363,543
12-22-94
TI-18902
08/363,450
12-22-94
TI-19880
08/363,459
12-22-94
TI-20173
08/362,201
12-22-94
TI-20174
08/363,449
12-22-94
TI-20175
08/362,032
12-22-94
TI-20177
08/362,351
12-22-94
TI-20178
08/362,288
12-22-94
TI-20180
08/362,637
12-22-94
TI-20181
08/362,033
12-22-94
TI-20182
08/362,701
12-22-94
TI-20183
08/363,661
12-22-94
TI-20185
08/362,702
12-22-94
TI-20186
Other patent applications and patents are incorporated herein by reference by specific statements to that effect elsewhere in this application.
NOTICE
(C) Copyright, *M* Texas Instruments Incorporated 1994. A portion of the disclosure of this patent document contains material which is subject to copyright and mask work protection. The copyright and mask work owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright and mask work rights whatsoever.
1. Field of the Invention
This invention generally relates to electronic circuits, computer systems and methods of operating them.
2. Background of the Invention
Without limiting the scope of the invention, its background is described in connection with computer systems, as an example.
Early computers required large amounts of space, occupying whole rooms. Since then minicomputers and desktop computers entered the marketplace.
Popular desktop computers have included the “Apple” (Motorola 680x0 microprocessor-based) and “IBM-compatible” (Intel or other x86 microprocessor-based) varieties, also known as personal computers (PCs) which have become very popular for office and home use. Also, high-end desk top computers called workstations based on a number of superscalar and other very-high-performance microprocessors such as the SuperSPARC microprocessor have been introduced.
In a further development, a notebook-size or palm-top computer is optionally battery powered for portable user applications. Such notebook and smaller computers challenge the art in demands for conflicting goals of miniaturization, ever higher speed, performance and flexibility, and long life between battery recharges. Also, a desktop enclosure called a docking station has the portable computer fit into the docking station, and improvements in such portable-computer/docking-station systems are desirable. Improvements in circuits, integrated circuit devices, computer systems of all types, and methods to address all the just-mentioned challenges, among others, are desirable, as described herein.
SUMMARY OF THE INVENTION
Generally, and in one form of the present invention, an electronic system includes a first integrated circuit (IC) having a card system management interrupt (SMI) output pin and interrupt pins, and a logic circuit having an output connected to the card SMI pin. This IC further has inputs connected to a first and second set of registers and logic for first and second cards respectively. Each of the first and second sets of registers and logic include a first register having bits set by at least a card event and a battery condition event respectively. A logic gate responds to combine the bits from the first register. A second register has a bit for steering the output of of the logic gate for ordinary interrupt or for system management interrupt purposes depending on the state of the bit. A second integrated circuit has a system management interrupt (SMI) output pin and SMI circuitry including a SMI register connected to events sources eligible for SMI response including the card SMI output of the first integrated circuit. This second IC further has a mask, SMI register connected to the SMI register to select particular ones of the events sources for SMI response. A logic circuit is fed by the SMI register for combining the selected events sources to supply an internal SMI output. A three-state circuit has an input connected to the internal SMI output and an output connected to the SMI output pin. The second IC also has a shift register logic circuit fed by both the internal SMI output and the SMI output pin and having control logic to provide reset for the SMI register and a control signal Lo the logic circuit.
Each individual IC represents still other forms of the invention.
Other devices, systems and methods are also claimed.


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