Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-06-10
2002-03-12
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S680000, C438S677000, C438S648000
Reexamination Certificate
active
06355558
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor processing, and more particularly to a new and improved metallization structure, and associated method, for filling cavities while reducing or eliminating microvoids and improving grain texture.
BACKGROUND OF THE INVENTION
Multi-level semiconductor architectures create cavities, such as contact and via apertures, which have high aspect ratios. Aspect ratios range from less than 1.0 up to and greater than 10.0. High aspect ratio contact and via apertures are difficult to properly fill, or plug, with metal during the metallization process. The metallization process includes in part the application of first, or higher level, conductive material, typically a metal or sandwich structure of various metals.
There are several problems associated with the filling of contact and via apertures, including the formation of micro-voids and the formation of undesirable grain texture in the metallization layers. Microvoids are formed in the metallization layer during the deposition of the metal layer into the contact or via aperture. The formation of microvoids occurs typically in high aspect ratio contact and via apertures, and is often due to shadowing from surrounding features or by the metal “pinching-off” at the top of the aperture before the lower portion of the aperture is adequately filled with the metal. The formation or enclosure of microvoids during the metallization process leads to downstream processing problems and long-term reliability issues. For instance, the microvoids can outgas during subsequent high temperature, or low vacuum, operations and disrupt processing layers surrounding the microvoid.
One common type of metallization process is the application of a blanket layer of chemical vapor deposition (CVD) aluminum (Al). However, blanket CVD Al films enclose microvoids in high aspect ratio features. In the case of blanket CVD Al, the microvoiding is believed due to improper nucleation. In addition, hot sputtered or reflowed aluminum alloys also typically enclose microvoids in high aspect ratio features. The enclosure of microvoids, in the case of hot sputtering, is believed due to the lack of a continuous wetting layer. Additionally, hot sputtered or reflowed aluminum alloys require high process temperatures which can negatively impact the performance of previously processed features.
The enclosure of microvoids in high aspect ratio contact and via apertures can be overcome by the use of a CVD titanium nitride (TiN) wetting layer underneath the CVD Al layer. The resulting metal fill of the aperture with this process is not always desirable as some microvoids are still enclosed. The CVD TiN film also leads to poor grain texture of the overlying CVD Al film. Poor grain texture, as measured by the full width at half maximum of XRF rocking curve analysis of Al (111) planes, can make the control and minimization of electromigration difficult.
It is with these shortcomings of the presently available technology in mind that the instant invention was developed.
SUMMARY OF THE INVENTION
One of the important aspects of the present invention relates to a metallization fill structure and associated method for contact and via apertures that significantly reduces the occurrence of microvoids, and provides desirable grain texture.
An optimized CVD/PVD hybrid metallization process is set forth herein with respect to both contact and via structures. The process includes in part the deposition of a refractory metal layer (on a barrier layer for contact structures), plasma treatment of the refractory metal layer, the in situ deposition of a thin layer of CVD Al, followed by PVD Al—Cu in situ deposition and in situ reflow at wafer temperatures <400° C. The highly-conformal CVD Al liner enables reflow at substantially lower temperatures than needed for the cold/hot reflow process and reduces the cost of adding CVD Al to the process sequence by utilizing very thin CVD Al films, which require only a small amount of precursor per wafer to deposit. As the vias are still open following CVD liner deposition, voids formed by subsequent closure during low pressure PVD deposition do not trap significant quantities of gas and are readily annealed away. This invention can be used as an integrated plug and interconnect solution for Al—Cu metallization that is extendible beyond the requirements of 0.25 micron processing. A thin CVD Al liner followed by PVD Al—Cu and reflow enables highly reflective, large-grained Al films to be deposited with superior electrical performance.
The fill structure for contact apertures includes a layer of an annealed refractory metal as a first wetting or glue layer on the contact aperture, an optionally fortified barrier layer of TiN on the first wetting layer, a second layer of plasma-treated refractory metal for improved wetting or nucleation on the barrier layer, a layer of aluminum (Al) applied to the second refractory metal layer by chemical vapor deposition (CVD), and an Al alloy applied to the underlying CVD aluminum by plasma vapor deposition (PVD) to fill the contact aperture. An anti-reflective coating can be applied on the Al alloy.
The fill structure for via apertures includes an initial refractory metal liner deposited on the via aperture in situ. Optionally, a refractory metal liner can be deposited on the via aperture ex situ. Both of these initial refractory metal liners are plasma-treated. A CVD Al liner is positioned in situ on the initial refractory metal liner. A PVD Al alloy layer is positioned in situ on the CVD Al liner to fill the via aperture. An anti-reflection coating can then be applied to the Al alloy.
A modified barrier structure is disclosed for contact apertures and a modified liner is disclosed for via apertures. This invention improves grain orientation and texture, and allows complete filling of high aspect ratio holes, cavities and trenches. The solution to the problem is found in the plasma treated refractory metal liners, and nitrogen lean refractory metal liners. The invention reduces interconnect stack height and achieves complete fill even for aspect ratios of greater than 3.5:1.
A more complete appreciation of the present invention and its scope can be obtained from the accompanying drawings, which are briefly summarized below, the following detailed description of presently preferred embodiment of the invention, and the appended claims.
REFERENCES:
patent: 5266521 (1993-11-01), Lee et al.
patent: 5877087 (1999-03-01), Mosley et al.
patent: 5950108 (1999-09-01), Wu et al.
patent: 6080665 (2000-06-01), Chen et al.
M. Sekiguchi et al “Self-aligned barrier layer formation on TiSi2 layer with N2 plasma treatment” 1996 Proc 13th Int. VLSI Multilevel Interconn. Conf. (VMIC) p. 180, Jun. 1996.
Dixit Girish
Konecni Anthony
Brady III W. James
Everhart Caridad
Garner Jacqueline J.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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